UPSD3234A-40U6T STMicroelectronics, UPSD3234A-40U6T Datasheet - Page 95

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UPSD3234A-40U6T

Manufacturer Part Number
UPSD3234A-40U6T
Description
IC MCU 8032 64KB FLASH 80TQFP
Manufacturer
STMicroelectronics
Series
µPSDr
Datasheet

Specifications of UPSD3234A-40U6T

Core Processor
8032
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, UART/USART, USB
Peripherals
LVR, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
288KB (288K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPSD3234A-40U6T
Manufacturer:
STMicroelectronics
Quantity:
10 000
UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV
17
17.1
USB hardware
The characteristics of USB hardware are as follows:
The analog front-end is an on-chip generic USB transceiver. It is designed to allow voltage
levels equal to V
Universal Serial Bus. It is capable of receiving and transmitting serial data at low speed
(1.5Mb/s).
The SIE is the digital-front-end of the USB block. This module recovers the 1.5MHz clock,
detects the USB sync word and handles all low-level USB protocols and error checking. The
bit-clock recovery circuit recovers the clock from the incoming USB data stream and is able
to track jitter and frequency drift according to the USB specification. The SIE also translates
the electrical USB signals into bytes or signals. Depending upon the device USB address
and the USB endpoint.
Address, the USB data is directed to the correct endpoint on SIE interface. The data transfer
of this H/W could be of type control or interrupt.
The device’s USB address and the enabling of the endpoints are programmable in the SIE
configuration header.
USB related registers
The USB block is controlled via seven registers in the memory: (UADR, UCON0, UCON1,
UCON2, UISTA, UIEN, and USTA).
Three memory locations on chip which communicate the USB block are:
Table 63.
USBEN
Complies with the Universal Serial Bus specification Rev. 1.1
Integrated SIE (Serial Interface Engine), FIFO memory and transceiver
Low speed (1.5Mbit/s) device capability
Supports control endpoint0 and interrupt endpoint1 and 2
USB clock input must be 6MHz (requires MCU clock frequency to be 12, 24, or
36MHz).
USB endpoint0 data transmit register (UDT0)
USB endpoint0 data receive register (UDR0)
USB endpoint1 data transmit register (UDT1)
7
USB address register (UADR: 0EEh)
UADD6
DD
6
from the standard logic to interface with the physical layer of the
UADD5
5
UADD4
4
UADD3
3
UADD2
2
UADD1
1
USB hardware
UADD0
0
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