UPSD3234A-40U6T STMicroelectronics, UPSD3234A-40U6T Datasheet - Page 86

• Manufacturer Part Number: UPSD3234A-40U6T
• Description: IC MCU 8032 64KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3234A-40U6T

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, UART/USART, USB
• Peripherals: LVR, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 288KB (288K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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15.1
15.2
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2
C interface
Table 52.
Serial status register (SxSTA: S1STA, S2STA)
SxSTA is a “Read-only” register. The contents of this register may be used as a vector to a
service routine. This optimized the response time of the software and consequently that of
the I
Table
This flag is set, and an interrupt is generated, after any of the following events occur.
1.
2.
3.
4.
5.
Data shift register (SxDAT: S1DAT, S2DAT)
SxDAT contains the serial data to be transmitted or data which has just been received. The
MSB (Bit 7) is transmitted or received first; that is, data shifted from right to left.
Table 53.
CR2
GC
2
Own slave address has been received during AA = 1: ack_int
The general call address has been received while GC(SxADR.0) = 1 and AA = 1:
A data byte has been received or transmitted in Master mode (even if arbitration is lost):
ack_int
A data byte has been received or transmitted as selected slave: ack_int
A stop condition is received as selected slave receiver or transmitter: stop_int
1
1
7
C-bus. The status codes for all possible modes of the I
54.
Selection of the serial clock frequency SCL in Master mode (continued)
Serial status register (SxSTA)
STOP
CR1
1
1
6
INTR
CR0
0
1
5
UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV
TX_MODE
divisor
f
480
960
OSC
4
12 MHz
BBUSY
12.5
6.25
3
Bit rate (kHz) at f
2
24 MHz
BLOST
C-bus interface are given Table
12.5
25
2
/ACK_REP
36 MHz
18.75
37.5
1
OSC
40 MHz
SLV
20
41
0