UPSD3234A-40U6T STMicroelectronics, UPSD3234A-40U6T Datasheet - Page 98

• Manufacturer Part Number: UPSD3234A-40U6T
• Description: IC MCU 8032 64KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3234A-40U6T

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, UART/USART, USB
• Peripherals: LVR, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 288KB (288K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

USB hardware
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Table 70.
Table 71.
TSEQ1
3 to 0
Bit
7
6
5
4
7
EP12SEL
Description of the UCON0 bits
USB Endpoint1 (and 2) transmit control register (UCON1: 0EBh)
TP0SIZ3
TP0SIZ0
Symbol
STALL0
TSEQ0
RX0E
TX0E
to
6
TX1E
R/W
R/W
R/W
R/W
R/W
R/W
5
UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV
Endpoint0 Data Sequence Bit. (0=DATA0, 1=DATA1)
This bit determines which type of data packet (DATA0 or
DATA1) will be sent during the next IN transaction. Toggling of
this bit must be controlled by software. RESET clears this bit
Endpoint0 Force Stall Bit.
This bit causes Endpoint 0 to return a STALL handshake when
polled by either an IN or OUT token by the USB Host
Controller. The USB hardware clears this bit when a SETUP
token is received. RESET clears this bit.
Endpoint0 Transmit Enable.
This bit enables a transmit to occur when the USB Host
Controller sends an IN token to Endpoint 0. Software should
set this bit when data is ready to be transmitted. It must be
cleared by software when no more Endpoint 0 data needs to
be transmitted. If this bit is '0' or the TXD0F is set, the USB will
respond with a NAK handshake to any Endpoint 0 IN tokens.
RESET clears this bit.
Endpoint0 receive enable.
This bit enables a receive to occur when the USB Host
Controller sends an OUT token to Endpoint 0. Software should
set this bit when data is ready to be received. It must be
cleared by software when data cannot be received. If this bit is
'0' or the RXD0F is set, the USB will respond with a NAK
handshake to any Endpoint 0 OUT tokens. RESET clears this
bit.
The number of transmit data bytes. These bits are cleared by
RESET.
FRESUM
4
TP1SIZ3
3
Function
TP1SIZ2
2
TP1SIZ1
1
TP1SIZ0
0