UPSD3234A-40U6T STMicroelectronics, UPSD3234A-40U6T Datasheet - Page 67

• Manufacturer Part Number: UPSD3234A-40U6T
• Description: IC MCU 8032 64KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3234A-40U6T

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, UART/USART, USB
• Peripherals: LVR, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 288KB (288K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV
12.2
be activated only if RB8 = 1. This feature is enabled by setting Bit SM2 in SCON. A way to
use this feature in multi-processor systems is as follows:
When the master processor wants to transmit a block of data to one of several slaves, it first
sends out an address byte which identifies the target slave. An address byte differs from a
data byte in that the 9th bit is '1' in an address byte and 0 in a data byte. With SM2 = 1, no
slave will be interrupted by a data byte. An ad-dress byte, however, will interrupt all slaves,
so that each slave can examine the received byte and see if it is being addressed. The
addressed slave will clear its SM2 bit and prepare to receive the data bytes that will be
coming. The slaves that weren’t being addressed leave their SM2s set and go on about their
business, ignoring the coming data bytes.
SM2 has no effect in Mode 0, and in Mode 1 can be used to check the validity of the Stop
bit. In a Mode 1 reception, if SM2 = 1, the receive interrupt will not be activated unless a
valid Stop bit is received.
Serial port control register
The serial port control and status register is the Special Function Register SCON (SCON2
for the second port), shown in
bits, but also the 9th data bit for transmit and receive (TB8 and RB8), and the Serial Port
Interrupt bits (TI and RI).
Table 43.
Table 44.
SM0
Bit
7
7
6
5
4
3
2
Serial port control register (SCON)
Description of the SCON bits
Symbol
REN
SM1
SM0
SM1
SM2
TB8
RB8
6
(SM1,SM0)=(0,0): Shift Register. Baud rate = f
(SM1,SM0)=(1,0): 8-bit UART. Baud rate = variable
(SM1,SM0)=(0,1): 8-bit UART. Baud rate = f
(SM1,SM0)=(1,1): 8-bit UART. Baud rate = variable
Enables the multiprocessor communication features in Mode 2 and 3. In
Mode 2 or 3, if SM2 is set to '1,' RI will not be activated if its received 8th
data bit (RB8) is '0.' In Mode 1, if SM2=1, RI will not be activated if a valid
Stop bit was not received. In Mode 0, SM2 should be '0'
Enables serial reception. Set by software to enable reception. Clear by
software to disable reception
The 8th data bit that will be transmitted in Modes 2 and 3. Set or clear by
software as desired
In Modes 2 and 3, this bit contains the 8th data bit that was received. In
Mode 1, if SM2=0, RB8 is the Snap Bit that was received. In Mode 0, RB8
is not used
SM2
5
Figure
26. This register contains not only the mode selection
REN
4
TB8
3
Function
Standard serial interface (UART)
RB8
2
OSC
OSC
/64 or f
/12
OSC
TI
1
/32
RI
0
67/189