UPSD3234A-40U6T STMicroelectronics, UPSD3234A-40U6T Datasheet - Page 124

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UPSD3234A-40U6T

Manufacturer Part Number
UPSD3234A-40U6T
Description
IC MCU 8032 64KB FLASH 80TQFP
Manufacturer
STMicroelectronics
Series
µPSDr
Datasheet

Specifications of UPSD3234A-40U6T

Core Processor
8032
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, UART/USART, USB
Peripherals
LVR, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
288KB (288K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPSD3234A-40U6T
Manufacturer:
STMicroelectronics
Quantity:
10 000
Memory blocks
22.10.3
22.10.4
124/189
Figure 53. Priority level of memory and I/O components in the PSD module
Table 89.
Separate Space mode
Program space is separated from Data space. For example, Program Select Enable (PSEN)
is used to access the program code from the primary Flash memory, while READ Strobe
(RD) is used to access data from the secondary Flash memory, SRAM and I/O Port blocks.
This configuration requires the VM Register to be set to 0Ch (see
Combined Space modes
The Program and Data spaces are combined into one memory space that allows the
primary Flash memory, secondary Flash memory, and SRAM to be accessed by either
Program Select Enable (PSEN) or READ Strobe (RD). For example, to configure the
primary Flash memory in Combined space, Bits b2 and b4 of the VM Register are set to '1'
(see
0 =
disable
PIO
mode
1=
enable
PIO
mode
PIO_EN
Bit 7
Figure
not
used
not
used
Bit 6
55).
VM register
not
used
not
used
Bit 5
Highest Priority
Lowest Priority
0 = RD
can’t
access
Flash
memory
1 = RD
access
Flash
memory
FL_Data
Primary
Bit 4
UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV
0 = RD can’t
access
Secondary
Flash memory
1 = RD access
Secondary
Flash memory
Primary Flash Memory
Secondary
Non-Volatile Memory
SRAM, I/O, or
Peripheral I/O
Secondary
Bit 3
Data
Level 1
Level 2
Level 3
0 =
PSEN
can’t
access
Flash
memory
1 =
PSEN
access
Flash
memory
Primary
FL_Cod
Bit 2
e
AI02867D
0 = PSEN can’t
access
Secondary
Flash memory
1 = PSEN
access
Secondary
Flash memory
Figure
Secondary
Code
Bit 1
54).
0 = PSEN
can’t
access
SRAM
1 = PSEN
access
SRAM
SRAM_Co
Bit 0
de

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