UPSD3234A-40U6T STMicroelectronics, UPSD3234A-40U6T Datasheet - Page 119

• Manufacturer Part Number: UPSD3234A-40U6T
• Description: IC MCU 8032 64KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3234A-40U6T

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, UART/USART, USB
• Peripherals: LVR, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 288KB (288K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV
22.6.3
It is suggested (as with all Flash memories) to read the location again after the embedded
programming algorithm has completed, to compare the byte that was written to Flash
memory with the byte that was intended to be written.
When using the Data Toggle method after an Erase cycle,
Flag bit (DQ6) toggles until the Erase cycle is complete. A 1 on the Error Flag bit (DQ5)
indicates a time-out condition on the Erase cycle; a '0' indicates no error. The MCU can read
any location within the sector being erased to get the Toggle Flag bit (DQ6) and the Error
Flag bit (DQ5).
PSDsoft Express generates ANSI C code functions which implement these Data Toggling
algorithms.
Figure 52. Data toggle flowchart
Unlock Bypass
The Unlock Bypass instructions allow the system to program bytes to the Flash memories
faster than using the standard Program instruction. The Unlock Bypass mode is entered by
first initiating two Unlock cycles. This is followed by a third WRITE cycle containing the
Unlock Bypass code, 20h (as shown in
The Flash memory then enters the Unlock Bypass mode. A two-cycle Unlock Bypass
Program instruction is all that is required to program in this mode. The first cycle in this
instruction contains the Unlock Bypass Program code, A0h. The second cycle contains the
program address and data. Additional data is programmed in the same manner. These
instructions dispense with the initial two Unlock cycles required in the standard Program
instruction, resulting in faster total Flash memory programming.
During the Unlock Bypass mode, only the Unlock Bypass Program and Unlock Bypass
Reset Flash instructions are valid.
NO
Table
DQ5 & DQ6
READ DQ6
TOGGLE
TOGGLE
START
READ
FAIL
DQ6
DQ5
DQ6
= 1
=
=
YES
YES
YES
85).
NO
NO
PASS
AI01370B
Figure 52
still applies. the Toggle
Memory blocks
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