UPSD3234A-40U6T STMicroelectronics, UPSD3234A-40U6T Datasheet - Page 26

• Manufacturer Part Number: UPSD3234A-40U6T
• Description: IC MCU 8032 64KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3234A-40U6T

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, UART/USART, USB
• Peripherals: LVR, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 288KB (288K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Architecture overview
Note:
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In UPSD323xx devices, the stack resides in on-chip RAM, and grows upwards. The PUSH
instruction first increments the Stack Pointer (SP), then copies the byte into the stack. PUSH
and POP use only direct addressing to identify the byte being saved or restored, but the
stack itself is accessed by indirect addressing using the SP register. This means the stack
can go into the Upper 128 bytes of RAM, if they are implemented, but not into SFR space.
The Data Transfer instructions include a 16-bit MOV that can be used to initialize the Data
Pointer (DPTR) for look-up tables in Program Memory.
The XCH A, <byte> instruction causes the Accumulator and ad-dressed byte to exchange
data. The XCHD A, @Ri instruction is similar, but only the low nibbles are involved in the
exchange. To see how XCH and XCHD can be used to facilitate data manipulations,
consider first the problem of shifting and 8-digit BCD number two digits to the right.
shows how this can be done using XCH instructions. To aid in understanding how the code
works, the contents of the registers that are holding the BCD number and the content of the
Accumulator are shown alongside each instruction to indicate their status after the
instruction has been executed.
After the routine has been executed, the Accumulator contains the two digits that were
shifted out on the right. Doing the routine with direct MOVs uses 14 code bytes. The same
operation with XCHs uses only 9 bytes and executes almost twice as fast. To right-shift by
an odd number of digits, a one-digit must be executed.
will right-shift a BCD number one digit, using the XCHD instruction. Again, the contents of
the registers holding the number and of the accumulator are shown alongside each
instruction.
Table 6.
First, pointers R1 and R0 are set up to point to the two bytes containing the last four BCD
digits. Then a loop is executed which leaves the last byte, location 2EH, holding the last two
digits of the shifted number. The pointers are decremented, and the loop is repeated for
location 2DH. The CJNE instruction (Compare and Jump if Not equal) is a loop control that
will be described later. The loop executed from LOOP to CJNE for R1 = 2EH, 2DH, 2CH,
and 2BH. At that point the digit that was originally shifted out on the right has propagated to
location 2AH. Since that location should be left with 0s, the lost digit is moved to the
Accumulator.
MOV DPTR,#data16
MOV <dest>,<src>
MOV <dest>,A
XCH A,<byte>
XCHD A,@Ri
MOV A,<src>
PUSH <src>
POP <dest>
Mnemonic
Data transfer instructions that access internal data memory space
Exchange low nibbles of A and
MOV <dest>,”@SP”; DEC SP
Exchange contents of A and
INC SP; MOV “@SP”,<src>
DPTR = 16-bit immediate
<dest> = <src>
<dest> = A
Operation
A = <src>
constant
UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV
<byte>
@Ri
Dir.
Table 9
X
X
X
X
X
X
Addressing modes
shows a sample of code that
Ind.
X
X
X
X
X
Reg.
X
X
X
X
Table 8
Imm.
X
X
X