UPSD3234A-40U6T STMicroelectronics, UPSD3234A-40U6T Datasheet - Page 152

• Manufacturer Part Number: UPSD3234A-40U6T
• Description: IC MCU 8032 64KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3234A-40U6T

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, UART/USART, USB
• Peripherals: LVR, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 288KB (288K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Programming in-circuit using the JTAG serial interface UPSD3234A, UPSD3234BV, UPSD3233B,
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Programming in-circuit using the JTAG serial
interface
The JTAG Serial Interface pins (TMS, TCK, TDI, and TDO) are dedicated pins on Port C
(see
PSD module Configuration Register Bits may be programmed through the JTAG Serial
Interface block. A blank device can be mounted on a printed circuit board and programmed
using JTAG.
The standard JTAG signals (IEEE 1149.1) are TMS, TCK, TDI, and TDO. Two additional
signals, TSTAT and TERR, are optional JTAG extensions used to speed up Program and
Erase cycles.
By default, on a blank device (as shipped from the factory or after erasure), four pins on Port
C are the basic JTAG signals TMS, TCK, TDI, and TDO.
Standard JTAG Signals
At power-up, the standard JTAG pins are inputs, waiting for a JTAG serial command from an
external JTAG controller device (such as FlashLINK or Automated Test Equipment). When
the enabling command is received, TDO becomes an output and the JTAG channel is fully
functional. The same command that enables the JTAG channel may optionally enable the
two additional JTAG signals, TSTAT and TERR.
The RESET input to the uPS3200 should be active during JTAG programming. The active
RESET puts the MCU module into RESET mode while the PSD module is being
programmed. See Application Note AN1153 for more details on JTAG In-System
Programming (ISP).
UPSD323xx devices support JTAG In-System-Configuration (ISC) commands, but not
Boundary Scan. The PSDsoft Express software tool and FlashLINK JTAG programming
cable implement the JTAG In-System-Configuration (ISC) commands.
Table 107. JTAG port signals
JTAG extensions
TSTAT and TERR are two JTAG extension signals enabled by an “ISC_ENABLE” command
received over the four standard JTAG signals (TMS, TCK, TDI, and TDO). They are used to
speed Program and Erase cycles by indicating status on uPDS signals instead of having to
Table
Port C Pin
PC0
PC1
PC3
PC4
PC5
PC6
107). All memory blocks (primary and secondary Flash memory), PLD logic, and
JTAG Signals
TSTAT
TERR
TMS
TDO
TCK
TDI
Mode Select
Clock
Status (optional)
Error Flag (optional)
Serial Data In
Serial Data Out
Description