UPSD3234A-40U6T STMicroelectronics, UPSD3234A-40U6T Datasheet - Page 50
UPSD3234A-40U6T
Manufacturer Part Number
UPSD3234A-40U6T
Description
IC MCU 8032 64KB FLASH 80TQFP
Manufacturer
STMicroelectronics
Series
µPSDr
Datasheet
1.UPSD3234A-40U6T.pdf
(189 pages)
Specifications of UPSD3234A-40U6T
Core Processor
8032
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, UART/USART, USB
Peripherals
LVR, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
288KB (288K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Power-saving mode
6.4
6.5
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Table 27.
1. See the T2CON register for details of the flag description
Idle mode
The instruction that sets PCON.0 is the last instruction executed in the normal operating
mode before Idle mode is activated. Once in the Idle mode, the CPU status is preserved in
its entirety: Stack pointer, Program counter, Program status word, Accumulator, RAM and All
other registers maintain their data during Idle mode.
There are three ways to terminate the Idle mode.
1.
2.
3.
Power-down mode
The instruction that sets PCON.1 is the last executed prior to going into the Power-down
mode. Once in Power-down mode, the oscillator is stopped. The contents of the on-chip
RAM and the Special Function Register are preserved.
The Power-down mode can be terminated by an external RESET.
Bit
Activation of any enabled interrupt will cause PCON.0 to be cleared by hardware
terminating Idle mode. The interrupt is serviced, and following return from interrupt
instruction RETI, the next instruction to be executed will be the one which follows the
instruction that wrote a logic '1' to PCON.0.
External hardware reset: the hardware reset is required to be active for two machine
cycle to complete the RESET operation.
Internal reset: the microcontroller restarts after 3 machine cycles in all cases.
7
6
5
4
3
2
1
0
Description of the PCON bits
ADSFINT Enable ADC Interrupt
RCLK1
TCLK1
Symbol
SMOD1
LVREN
SMOD
IDL
PD
(1)
(1)
Double baud data rate bit UART
Double baud data rate bit 2nd UART
LVR disable bit (active High)
Received clock flag (UART 2)
Transmit clock flag (UART 2)
Activate Power-down mode (High enable)
Activate Idle mode (High enable)
UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV
Function
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