UPSD3234A-40U6T STMicroelectronics, UPSD3234A-40U6T Datasheet - Page 23

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UPSD3234A-40U6T

Manufacturer Part Number
UPSD3234A-40U6T
Description
IC MCU 8032 64KB FLASH 80TQFP
Manufacturer
STMicroelectronics
Series
µPSDr
Datasheet

Specifications of UPSD3234A-40U6T

Core Processor
8032
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, UART/USART, USB
Peripherals
LVR, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
288KB (288K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPSD3234A-40U6T
Manufacturer:
STMicroelectronics
Quantity:
10 000
UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV
2.10
Note:
Note:
Example:
Figure 12. Indexed addressing
Arithmetic instructions
The arithmetic instructions is listed in
that can be used with each instruction to access the <byte> operand. For example, the ADD
A, <byte> instruction can be written as:
Any byte in the internal Data Memory space can be incremented without going through the
Accumulator.
One of the INC instructions operates on the 16-bit Data Pointer. The Data Pointer is used to
generate 16-bit addresses for external memory, so being able to increment it in one 16-bit
operation is a useful feature.
The MUL AB instruction multiplies the Accumulator by the data in the B register and puts the
16-bit product into the concatenated B and Accumulator registers.
The DIV AB instruction divides the Accumulator by the data in the B register and leaves the
8-bit quotient in the Accumulator, and the 8-bit remainder in the B register.
In shift operations, dividing a number by 2n shifts its “n” bits to the right. Using DIV AB to
perform the division completes the shift in 4?s and leaves the B register holding the bits that
were shifted out. The DAA instruction is for BCD arithmetic operations. In BCD arithmetic,
ADD and ADDC instructions should always be followed by a DAA operation, to ensure that
the result is also in BCD.
DAA will not convert a binary number to BCD. The DAA operation produces a meaningful
result only as the second step in the addition of two BCD bytes.
Table 4.
ADDC A,<byte>
SUBB A,<byte>
ADD A,<byte>
movc A, @A+DPTR
ADD a, 7FH (direct addressing)
ADD A, @R0 (indirect addressing)
ADD a, R7 (register addressing)
ADD A, #127 (immediate constant)
Mnemonic
Arithmetic instructions
A = A + <byte> + C
A = A – <byte> – C
A = A + <byte>
ACC
3Ah
Operation
Table
1E73h
DPTR
4. The table indicates the addressing modes
Program Memory
Dir.
X
X
X
AI06643
3Eh
Addressing modes
Ind.
X
X
X
Architecture overview
Reg.
X
X
X
Imm.
23/189
X
X
X

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