UPSD3234A-40U6T STMicroelectronics, UPSD3234A-40U6T Datasheet - Page 89

• Manufacturer Part Number: UPSD3234A-40U6T
• Description: IC MCU 8032 64KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3234A-40U6T

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, UART/USART, USB
• Peripherals: LVR, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 288KB (288K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV
16
16.1
DDC interface
The basic DDC unit consists of an I
storage. The 8032 core is responsible of loading the contents of the SRAM with the DDC
data. The DDC unit has the following features:
●
●
●
●
●
The interface signals for the DDC can be mapped to pins in Port 4. The interface consists of
the standard V
diagram is illustrated in
Figure 39. DDC interface block diagram
Special Function register for the DDC interface
There are eight SFR in the DDC interface:
●
●
Supports both DDC1 and DDC2b modes
Features 256 bytes of DDC data - initialized by the 8032 core
Supports fully automatic operation of DDC1 and DDC2b modes
DDC operates in Slave mode only
SW Interrupt mode available (existing design)
RAMBUF, DDCCON, DDCADR, DDCDAT are DDC registers.
S1CON, S1STA, S1DAT, S1ADR are I
described in the standalone I
SCL1
SDA1
VSYNC
SYNC
EN
DDCCON
X
(P4.2), SDA (P4.0) and SCL (P4.1) DDC signals. The conceptual block
DAT
DDC2B+Interface
EX_
DDC2B/DDC2AB
Arbitration Logic
ENB
DDC1/DDC2
SW
Figure
Detection
X
DDC1
INT
42.
DDC1
EN
2
SWH
S1ADR0
S1ADR1
INT
S1DAT
SISTA
SICON
DDCDAT
C bus.
2
7
C interface and 256 bytes of SRAM for DDC data
Initialization Synchronization
M0
Bus Clock Generator
DDC1 Hold Register
DDC1 Transmitter
Monitor Address
Monitor Address
Shift Register
2
C Interface registers, same as the ones
INTR (from SISTA)
1
0
INT
DDCADR
Address Pointer
RAMBUF
Buffer
RAM
DDC interface
AI06628
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