UPSD3234A-40U6T STMicroelectronics, UPSD3234A-40U6T Datasheet - Page 28

• Manufacturer Part Number: UPSD3234A-40U6T
• Description: IC MCU 8032 64KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3234A-40U6T

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, UART/USART, USB
• Peripherals: LVR, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 288KB (288K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Architecture overview
2.12.2
Note:
2.12.3
28/189
External RAM
Table 10
Only indirect addressing can be used. The choice is whether to use a one-byte address,
@Ri, where Ri can be either R0 or R1 of the selected register bank, or a two-byte
address, @DTPR.
In all external Data RAM accesses, the Accumulator is always either the destination or
source of the data.
Lookup tables
Table 11
Memory. Since these instructions access only Program Memory, the lookup tables can only
be read, not updated.
The mnemonic is MOVC for “move constant.” The first MOVC instruction in
accommodate a table of up to 256 entries numbered 0 through 255. The number of the
desired entry is loaded into the Accumulator, and the Data Pointer is set up to point to the
beginning of the table. Then:
copies the desired table entry into the Accumulator.
The other MOVC instruction works the same way, except the Program Counter (PC) is used
as the table base, and the table is accessed through a subroutine. First the number of the
desired en-try is loaded into the Accumulator, and the subroutine is called:
The subroutine “TABLE” would look like this:
The table itself immediately follows the RET (return) instruction is Program Memory. This
type of table can have up to 255 entries, numbered 1 through 255. Number 0 cannot be
used, because at the time the MOVC instruction is executed, the PC contains the address of
the RET instruction. An entry numbered 0 would be the RET opcode itself.
Table 10.
Table 11.
Address Width
MOVC A, @A+DPTR
MOV A , ENTRY NUMBER
CALL TABLE
TABLE: MOVC A , @A+PC
RET
16 bits
16 bits
8 bits
8 bits
MOVC A,@A+DPTR
shows a list of the Data Transfer instructions that access external Data Memory.
shows the two instructions that are available for reading lookup tables in Program
MOVC A,@A+PC
Data transfer instruction that access external data memory space
Lookup table READ instruction
Mnemonic
MOVX A,@DPTR
MOVX @DPTR,a
MOVX A,@Ri
MOVX @Ri,A
Mnemonic
UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV
READ program memory at (A+DPTR)
READ program memory at (A+PC)
WRITE external RAM @DPTR
READ external RAM @DPTR
WRITE external RAM @Ri
READ external RAM @Ri
Operation
Operation
Table 11
can