UPSD3234A-40U6T STMicroelectronics, UPSD3234A-40U6T Datasheet - Page 92

• Manufacturer Part Number: UPSD3234A-40U6T
• Description: IC MCU 8032 64KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3234A-40U6T

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, UART/USART, USB
• Peripherals: LVR, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 288KB (288K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

DDC interface
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Host type detection
The detection procedure conforms to the sequences proposed by VESA Monitor Display
Data Channel (DDC) specification. The monitor needs to determine the type of host system:
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●
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Figure 40. Host type detection
DDC1 protocol
DDC1 is primitive and a point to point interface. The monitor is always put at “Transmit only”
mode.
In the initialization phase, 9 clock cycles on V
synchronization.
During this period, the SDA pin will be kept at high impedance state.
If DDC1 hardware mode is used, the following procedure is recommended to proceed DDC1
operation.
DDC1 or OLD type host
DDC2B host (Host is master, monitor is always slave)
DDC2B+/DDC2AB(ACCESS.bus) host
Power on
UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV
EDID sent continously using
Is VSYNC present?
Stop sending of EDID
communication mode
DDC2B command
Is it DDC2B
command?
VSYNC as clock
Is DDC2 clock
Communication
switch to DDC2
Respond to
present?
isidle
CLK
pin will be given for the internal
command detected?
DDC2B+/DDC2AB?
DDC2 communication
Has a command
Respond to DDC2B+/
been received?
DDC2AB command
Is 2B+/A.B
is idle.
Is
AI06644