UPSD3234A-40U6T STMicroelectronics, UPSD3234A-40U6T Datasheet - Page 153

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UPSD3234A-40U6T

Manufacturer Part Number
UPSD3234A-40U6T
Description
IC MCU 8032 64KB FLASH 80TQFP
Manufacturer
STMicroelectronics
Series
µPSDr
Datasheet

Specifications of UPSD3234A-40U6T

Core Processor
8032
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, UART/USART, USB
Peripherals
LVR, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
288KB (288K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPSD3234A-40U6T
Manufacturer:
STMicroelectronics
Quantity:
10 000
UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV
27.3
scan the status out serially using the standard JTAG channel. See Application Note
AN1153.
TERR indicates if an error has occurred when erasing a sector or programming a byte in
Flash memory. This signal goes Low (active) when an Error condition occurs, and stays Low
until an “ISC_CLEAR” command is executed or a chip Reset (RESET) pulse is received
after an “ISC_DISABLE” command.
TSTAT behaves the same as Ready/Busy described in
TSTAT is High when the PSD module device is in READ mode (primary and secondary
Flash memory contents can be read). TSTAT is Low when Flash memory Program or Erase
cycles are in progress, and also when data is being written to the secondary Flash memory.
TSTAT and TERR can be configured as open-drain type signals during an “ISC_ENABLE”
command.
Security and Flash memory protection
When the Security Bit is set, the device cannot be read on a Device Programmer or through
the JTAG Port. When using the JTAG Port, only a Full Chip Erase command is allowed.
All other Program, Erase and Verify commands are blocked. Full Chip Erase returns the part
to a non-secured blank state. The Security Bit can be set in PSDsoft Express Configuration.
All primary and secondary Flash memory sectors can individually be sector protected
against erasures. The sector protect bits can be set in PSDsoft Express Configuration.
Programming in-circuit using the JTAG
Section 22.2.1: Ready/Busy
(PC3).
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