UPSD3234A-40U6T STMicroelectronics, UPSD3234A-40U6T Datasheet - Page 60

• Manufacturer Part Number: UPSD3234A-40U6T
• Description: IC MCU 8032 64KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3234A-40U6T

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, UART/USART, USB
• Peripherals: LVR, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 288KB (288K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Timer/counters (Timer 0, Timer 1 and Timer 2)
11.1.1
11.1.2
60/189
Table 37.
Mode 0
Putting either Timer into Mode 0 makes it look like an 8048 Timer, which is an 8-bit Counter
with a divide-by-32 prescaler.
1.
In this mode, the Timer register is configured as a 13-bit register. As the count rolls over
from all '1s' to all '0s,' it sets the Timer Interrupt Flag TF1. The counted input is enabled to
the Timer when TR1 = 1 and either GATE = 0 or /INT1 = 1. (Setting GATE = 1 allows the
Timer to be controlled by external input /INT1, to facilitate pulse width measurements). TR1
is a control bit in the Special Function Register TCON (TCON Control Register). GATE is in
TMOD.
The 13-bit register consists of all 8 bits of TH1 and the lower 5 bits of TL1. The upper 3 bits
of TL1 are indeterminate and should be ignored. Setting the run flag does not clear the
registers.
Mode 0 operation is the same for the Timer 0 as for Timer 1. Substitute TR0, TF0, and /INT0
for the corresponding Timer 1 signals in
Timer 1 and one for Timer0.
Figure 21. Timer/counter mode 0: 13-bit counter
Mode 1
Mode 1 is the same as Mode 0, except that the Timer register is being run with all 16 bits.
Table 38.
Gate
Bit
1
0
7
INT1 pin
Gate
Description of the TCON bits
TMOD register (TMOD)
Symbol
T1 pin
C/T
IE0
IT0
f
OSC
6
TR1
÷ 12
Interrupt 0 Edge Flag. Set by hardware when external interrupt edge
detected. Cleared when interrupt processed
Interrupt 0 Type Control Bit. Set/cleared by software to specify falling-
edge/low-level triggered external interrupt
M1
5
Figure 21
C/T = 0
C/T = 1
M0
4
Figure 21
shows the Mode 0 operation as it applies to Timer
Control
UPSD3234A, UPSD3234BV, UPSD3233B,
Gate
There are two different GATE Bits, one for
(5 bits)
3
TL1
Function
(8 bits)
TH1
C/T
2
TF1
M1
1
Interrupt
AI06622
M0
0