UPSD3234A-40U6T STMicroelectronics, UPSD3234A-40U6T Datasheet - Page 120

• Manufacturer Part Number: UPSD3234A-40U6T
• Description: IC MCU 8032 64KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3234A-40U6T

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, UART/USART, USB
• Peripherals: LVR, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 288KB (288K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Memory blocks
22.7
22.7.1
22.7.2
22.7.3
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To exit the Unlock Bypass mode, the system must issue the two-cycle Unlock Bypass Reset
Flash instruction. The first cycle must contain the data 90h; the second cycle the data 00h.
Addresses are Don’t Care for both cycles. The Flash memory then returns to READ mode.
Erasing Flash memory
Flash Bulk Erase
The Flash Bulk Erase instruction uses six WRITE operations followed by a READ operation
of the status register, as described in
wrong, the Bulk Erase instruction aborts and the device is reset to the READ Flash memory
status.
During a Bulk Erase, the memory status may be checked by reading the Error Flag bit
(DQ5), the Toggle Flag bit (DQ6), and the Data Polling Flag bit (DQ7), as detailed in
Section 22.6: Programming Flash
been an Erase Failure (maximum number of Erase cycles have been executed).
It is not necessary to program the memory with 00h because the PSD module automatically
does this before erasing to 0FFh.
During execution of the Bulk Erase instruction, the Flash memory does not accept any
instructions.
Flash Sector Erase
The Sector Erase instruction uses six WRITE operations, as described in
Additional Flash Sector Erase codes and Flash memory sector addresses can be written
subsequently to erase other Flash memory sectors in parallel, without further coded cycles,
if the additional bytes are transmitted in a shorter time than the time-out period of about
100µs. The input of a new Sector Erase code restarts the time-out period.
The status of the internal timer can be monitored through the level of the Erase Time-out
Flag bit (DQ3). If the Erase Time-out Flag bit (DQ3) is '0,' the Sector Erase instruction has
been received and the time-out period is counting. If the Erase Time-out Flag bit (DQ3) is '1,'
the time-out period has expired and the embedded algorithm is busy erasing the Flash
memory sector(s). Before and during Erase time-out, any instruction other than Suspend
Sector Erase and Resume Sector Erase instructions abort the cycle that is currently in
progress, and reset the device to READ mode.
During a Sector Erase, the memory status may be checked by reading the Error Flag bit
(DQ5), the Toggle Flag bit (DQ6), and the Data Polling Flag bit (DQ7), as detailed in
Section 22.6: Programming Flash
During execution of the Erase cycle, the Flash memory accepts only RESET and Suspend
Sector Erase instructions. Erasure of one Flash memory sector may be suspended, in order
to read data from another Flash memory sector, and then resumed.
Suspend Sector Erase
When a Sector Erase cycle is in progress, the Suspend Sector Erase instruction can be
used to suspend the cycle by writing 0B0h to any address when an appropriate Sector
Select (FS0-FS7 or CSBOOT0-CSBOOT3) is High. (See
data from another Flash memory sector after the Erase cycle has been suspended.
UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV
memory. The Error Flag bit (DQ5) returns a '1' if there has
memory.
Table
85. If any byte of the Bulk Erase instruction is
Table
85). This allows reading of
Table
85.