UPSD3234A-40U6T STMicroelectronics, UPSD3234A-40U6T Datasheet - Page 22

• Manufacturer Part Number: UPSD3234A-40U6T
• Description: IC MCU 8032 64KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3234A-40U6T

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, UART/USART, USB
• Peripherals: LVR, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 288KB (288K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Architecture overview
2.9.2
2.9.3
2.9.4
2.9.5
2.9.6
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Indirect addressing
In indirect addressing the instruction specifies a register which contains the address of the
operand. Both internal and external RAM can be indirectly addressed. The address register
for 8-bit addresses can be R0 or R1 of the selected register bank, or the Stack Pointer. The
address register for 16-bit addresses can only be the 16-bit “data pointer” register, DPTR.
Example:
Figure 11. Indirect addressing
Register addressing
The register banks, containing registers R0 through R7, can be accessed by certain
instructions which carry a 3-bit register specification within the opcode of the instruction.
Instructions that access the registers this way are code efficient, since this mode eliminates
an address byte. When the instruction is executed, one of four banks is selected at
execution time by the two bank select bits in the PSW.
Example:
Register-specific addressing
Some instructions are specific to a certain register. For example, some instructions always
operate on the Accumulator, or Data Pointer, etc., so no address byte is needed to point it.
The opcode itself does that.
Immediate constants addressing
The value of a constant can follow the opcode in Program memory.
Example:
Indexed addressing
Only Program memory can be accessed with indexed addressing, and it can only be read.
This addressing mode is intended for reading look-up tables in Program memory. A 16-bit
base register (either DPTR or PC) points to the base of the table, and the Accumulator is set
up with the table entry number. The address of the table entry in Program memory is formed
by adding the Accumulator data to the base pointer.
mov @R1, #40 H ;[R1] <-----40H
mov PSW, #0001000B ; select Bank0
mov A, #30H
mov R1, A
mov A, #10H.
UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV
55h
R1
Program Memory
40h
55
AI06642