UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 130
UPD78F0890GK(A)-GAJ-AX
Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0890GKA-GAJ-AX.pdf
(732 pages)
Specifications of UPD78F0890GK(A)-GAJ-AX
Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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(2) Internal oscillator mode register (RCM)
130
This register sets the operation mode of internal oscillator.
RCM can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 80H
Address: FFA0H
Symbol
RCM
Notes 1. The value of this register is 00H immediately after a reset release but automatically
Caution When setting RSTOP to 1, be sure to confirm that the CPU operates with a clock
LSRSTOP
RSTOP
RSTS
RSTS
<7>
0
1
0
1
0
1
After reset: 80H
2. Bit 7 is read-only.
Figure 6-3. Format of Internal Oscillator Mode Register (RCM)
other than the internal high-speed oscillation clock. Specifically, set RSTOP to 1
under either of the following conditions.
• When MCS = 1 (when CPU operates with the high-speed system clock)
• When CLS = 1 (when CPU operates with the subsystem clock)
changes to 80H after internal high-speed oscillator oscillation has been stabilized.
Waiting for stabilization of internal high-speed oscillator oscillation in high-accuracy mode
(internal high-speed oscillator operation in low-accuracy mode)
Internal high-speed oscillator operation in high-accuracy mode
Internal low-speed oscillator oscillating
Internal low-speed oscillator stopped
Internal high-speed oscillator oscillating
Internal high-speed oscillator stopped
6
0
Note 1
CHAPTER 6 CLOCK GENERATOR
R/W
User’s Manual U17554EJ4V0UD
5
0
Note 2
Status of internal high-speed oscillator oscillation
Internal high-speed oscillator oscillating/stopped
Internal low-speed oscillator oscillating/stopped
Note 1
.
4
0
3
0
2
0
LSRSTOP
<1>
RSTOP
<0>
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