UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 329

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

(6) Asynchronous serial interface control register 6n (ASICL6n)
Address: FF58H After reset: 16H R/W
ASICL60
Note Bit 7 is read-only.
Symbol
This register controls the serial communication operations of serial interface UART60 and UART61.
ASICL6n can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 16H.
Caution ASICL6n can be refreshed (the same value is written) by software during a communication
Figure 14-17. Format of Asynchronous Serial Interface Control Register 60 (ASICL60) (1/2)
SBRF60
SBRF60
SBRT60
SBTT60
operation (when bits 7 and 6 (POWER6n, TXE6n) of ASIM6n = 1 or bits 7 and 5 (POWER6n,
RXE6n) of ASIM6n = 1). However, do not set both SBRT6n and SBTT6n to 1 by a refresh
operation during SBF reception (SBRT6n = 1) or SBF transmission (until INTST6n occurs
since SBTT6n has been set (1)), because it may re-trigger SBF reception or SBF transmission.
<7>
0
1
0
1
0
1
If POWER60 = 0 and RXE60 = 0 or if SBF reception has been completed correctly
SBF reception in progress
SBF reception trigger
SBF transmission trigger
SBRT60
CHAPTER 14 SERIAL INTERFACES UART60 AND UART61
<6>
Note
SBTT60
5
User’s Manual U17554EJ4V0UD
SBL620
4
SBF reception status flag
SBF transmission trigger
SBF reception trigger
SBL610
3
−
−
SBL600
2
DIR60
1
TXDLV60
0
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