UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 432

8BIT MCU, 128K FLASH, 7K RAM, LQFP

UPD78F0890GK(A)-GAJ-AX

Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0890GK(A)-GAJ-AX

Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
432
(7) CAN module last error code register (C0LEC)
After reset: 00H
Remarks 1. The contents of the C0LEC register are not cleared when the CAN module changes
The C0LEC register provides the error information of the CAN protocol.
C0LEC
LEC2
0
0
0
0
1
1
1
1
2. If an attempt is made to write a value other than 00H to the C0LEC register by
LEC1
from an operation mode to the initialization mode.
software, the access is ignored.
0
0
1
1
0
0
1
1
7
0
LEC0
0
1
0
1
0
1
0
1
R/W
6
0
No error
Stuff error
Form error
ACK error
Bit error (The CAN module tried to transmit a recessive-level bit as part
of a transmit message (except the arbitration field), but the value on the
CAN bus is a dominant-level bit.)
Bit error (The CAN module tried to transmit a dominant-level bit as part
of a transmit message, ACK bit, error frame, or overload frame, but the
value on the CAN bus is a recessive-level bit.)
CRC error
Undefined
CHAPTER 16 CAN CONTROLLER
Address: FF92H
User’s Manual U17554EJ4V0UD
5
0
4
0
Last CAN Protocol Error Information
3
0
LEC2
2
LEC1
1
LEC0
0

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