UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 567

8BIT MCU, 128K FLASH, 7K RAM, LQFP

UPD78F0890GK(A)-GAJ-AX

Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0890GK(A)-GAJ-AX

Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
20.4 Operations of Multiplier/Divider
20.4.1 Multiplication operation
• Initial setting
• During operation
• End of operation
• Next operation
1. Set operation data to multiplication/division data register A0L (MDA0L) and multiplication/division data register
2. Set bits 0 (DMUSEL0) and 7 (DMUE) of multiplier/divider control register 0 (DMUC0) to 1. Operation will start.
3. The operation will be completed when 16 internal clocks have been issued after the start of the operation
4. The operation result data is stored in the MDA0L and MDA0H registers.
5. DMUE is cleared to 0 (end of operation).
6. After the operation, an interrupt request signal (INTDMU) is generated.
7. To execute multiplication next, start from the initial setting in 20.4.1 Multiplication operation.
8. To execute division next, start from the initial setting in 20.4.2 Division operation.
B0 (MDB0).
(intermediate data is stored in the MDA0L and MDA0H registers during operation, and therefore the read
values of these registers are not guaranteed).
CHAPTER 20 MULTIPLIER/DIVIDER
User’s Manual U17554EJ4V0UD
567

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