UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 723

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

3rd
Edition
• Change of Figure 6-12 and Note 2
• Addition of Note 1
• Change of Figure 6-13 and Caution 2
• Addition of Caution 1
• Change of Figure 6-14
• Addition of Remark
Change of explanation and Remark in 6.4.3 When subsystem clock is not used
Figure 6-12 Operation of the clock generating circuit when power supply voltage injection (When 1.59 V POC
mode setup (option byte: LVISTART = 0))
Figure 6-13 Operation of the clock generating circuit when power supply voltage injection (When 2.7 V/1.59V
POC mode setup (option byte: LVISTART = 1))
Change of 6.6.1 Controlling high-speed system clock
Change of explanation and Addition of Note in 6.6.1 (2) Example of setting procedure when using the external
main system clock
Change of 6.6.2 Example of controlling internal high-speed oscillation clock
Change of 6.6.3 Example of controlling subsystem clock
Figure 6-14. CPU Clock Status Transition Diagram
Change of Table 6-5. Changing CPU Clock
Addition of 6.6.8 Time required for switchover of CPU clock and main system clock
Addition of 6.6.9 Conditions before clock oscillation is stopped
Change of explanation and Addition of Caution in 7.2 (1) 16-bit timer counter 0n (TM0n)
Addition of Caution in 7.2 (2) 16-bit timer capture/compare register 00n (CR00n)
Addition of 7.2 (4) Setting range when CR00n or CR01n is used as a compare register
Change of explanation in 7.3 (1) 16-bit timer mode control register 0n (TMC0n)
Change of Figure 7-8. Format of 16-Bit Timer Mode Control Register 00 (TMC00)
Change of Figure 7-9. Format of 16-Bit Timer Mode Control Register 01 (TMC01)
Change of Figure 7-10. Format of 16-Bit Timer Mode Control Register 02 (TMC02)
Change of Figure 7-11. Format of 16-Bit Timer Mode Control Register 03 (TMC03)
Change of explanation in 7.3 (2) Capture/compare control register 0n (CRC0n)
Change of Figure 7-12. Format of Capture/Compare Control Register 00 (CRC00)
Addition of Figure 7-13. Example of CR01n Capture Operation (When Rising Edge Is Specified)
Change of Figure 7-14. Format of Capture/Compare Control Register 01 (CRC01)
Change of Figure 7-15. Format of Capture/Compare Control Register 02 (CRC02)
Change of Figure 7-16. Format of Capture/Compare Control Register 03 (CRC03)
Change of explanation and Addition of Caution in 7.3 (3) 16-bit timer output control register 0n (TOC0n)
Change of Figure 7-17. Format of 16-Bit Timer Output Control Register 00 (TOC00)
Change of Figure 7-18. Format of 16-Bit Timer Output Control Register 01 (TOC01)
Change of Figure 7-19. Format of 16-Bit Timer Output Control Register 02 (TOC02)
Change of Figure 7-20. Format of 16-Bit Timer Output Control Register 03 (TOC03)
Change of explanation and Caution 1 to 3 in 7.3 (4) Prescaler mode register 0n (PRM0n)
Addition of 7.5 Special Use of TM0n
Addition of 7.6 Cautions for 16-Bit Timer/Event Counters 00 and 01
APPENDIX D REVISION HISTORY
User’s Manual U17554EJ4V0UD
Description
(2/9)
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