UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 254

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

(2) Timing chart
254
8-bit timer counter Hn
<1> The count operation is enabled by setting the TMHEn bit to 1. Start 8-bit timer counter Hn by masking one
<2> When the values of 8-bit timer counter Hn and the CMP0n register match, the TOHn output level is inverted,
<3> When the values of 8-bit timer counter Hn and the CMP1n register match, the level of the TOHn output is
<4> Clearing the TMHEn bit to 0 during timer Hn operation makes the INTTMHn signal and TOHn output inactive.
The operation timing in PWM output mode is shown below.
Remark n = 0, 1
Caution Make sure that the CMP1n register setting value (M) and CMP0n register setting value (N) are
(TOLEVn = 0)
(TOLEVn = 1)
Count clock
count clock to count up. At this time, TOHn output remains inactive (when TOLEVn = 0).
the value of 8-bit timer counter Hn is cleared, and the INTTMHn signal is output.
returned. At this time, the 8-bit timer counter value is not cleared and the INTTMHn signal is not output.
INTTMHn
TMHEn
CMP0n
CMP1n
TOHn
TOHn
within the following range.
00H ≤ CMP1n (M) < CMP0n (N) ≤ FFH
<1>
00H 01H
Figure 9-12. Operation Timing in PWM Output Mode (1/4)
CHAPTER 9 8-BIT TIMERS H0 AND H1
A5H 00H 01H 02H
User’s Manual U17554EJ4V0UD
<2>
(a) Basic operation
A5H
01H
<3>
A5H 00H
01H 02H
A5H 00H
<4>