UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 250
UPD78F0890GK(A)-GAJ-AX
Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0890GKA-GAJ-AX.pdf
(732 pages)
Specifications of UPD78F0890GK(A)-GAJ-AX
Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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(2) Timing chart
250
8-bit timer counter Hn
<1> The count operation is enabled by setting the TMHEn bit to 1. The count clock starts counting no more than
<2> When the values of 8-bit timer counter Hn and the CMP0n register match, the value of 8-bit timer counter Hn
<3> The INTTMHn signal and TOHn output become inactive by clearing the TMHEn bit to 0 during timer Hn
The timing of the interval timer/square-wave output operation is shown below.
Remark n = 0, 1
Count clock
1 clock after the operation is enabled.
is cleared, the TOHn output level is inverted, and the INTTMHn signal is output.
operation. If these are inactive from the first, the level is retained.
INTTMHn
TMHEn
CMP0n
TOHn
N = 01H to FEH
Figure 9-10. Timing of Interval Timer/Square-Wave Output Operation (1/2)
<1>
00H
Count start
01H
CHAPTER 9 8-BIT TIMERS H0 AND H1
User’s Manual U17554EJ4V0UD
match interrupt occurrence,
8-bit timer counter Hn clear
(a) Basic operation
Level inversion,
N
N
<2>
Clear
00H
01H
Interval time
match interrupt occurrence,
8-bit timer counter Hn clear
Level inversion,
N
<2>
Clear
00H
01H 00H
<3>
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