UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 263

8BIT MCU, 128K FLASH, 7K RAM, LQFP

UPD78F0890GK(A)-GAJ-AX

Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0890GK(A)-GAJ-AX

Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
<1> When TMHE1 = 0 and TCE51 = 0, 8-bit timer counter H1 operation is stopped.
<2> When TMHE1 = 1 is set, 8-bit timer counter H1 starts a count operation. At that time, the carrier clock is held
<3> When the count value of 8-bit timer counter H1 matches the CMP01 register value, the first INTTMH1 signal
<4> When the count value of 8-bit timer counter H1 matches the CMP11 register value, the INTTMH1 signal is
<5> When the INTTM51 signal is generated, it is synchronized with 8-bit timer H1 count clock and output as the
<6> A carrier signal is output at the first rising edge of the carrier clock if NRZ1 is set to 1.
<7> When NRZ1 = 0, the TOH1 output is held at the high level and is not changed to low level while the carrier
at the inactive level.
is generated, the carrier clock signal is inverted, and the compare register to be compared with 8-bit timer
counter H1 is switched from the CMP01 register to the CMP11 register. 8-bit timer counter H1 is cleared to
00H.
generated, the carrier clock signal is inverted, and the compare register to be compared with 8-bit timer
counter H1 is switched from the CMP11 register to the CMP01 register. 8-bit timer counter H1 is cleared to
00H. By performing procedures <3> and <4> repeatedly, a carrier clock with duty fixed to other than 50% is
generated.
INTTM5H1 signal.
clock is high level (from <6> and <7>, the high-level width of the carrier clock waveform is guaranteed).
8-bit timer counter
TM5n count value
Hn count value
8-bit timer Hn
Carrier clock
8-bit timer 5n
Carrier clock
count clock
count clock
INTTM5Hn
INTTMHn
INTTM5n
CMPn0
CMPn1
TMHEn
NRZBn
TCE5n
CR5n
NRZn
TOHn
Figure 9-15. Carrier Generator Mode Operation Timing (2/3)
<1> <2>
00H
00H 01H
0
(b) Operation when CMP01 = N, CMP11 = M
CHAPTER 9 8-BIT TIMERS H0 AND H1
0
N 00H 01H
<3>
User’s Manual U17554EJ4V0UD
L
1
00H 01H
<5>
<6>
<4>
1
M 00H
L 00H 01H
0
<7>
N
M
L
N 00H 01H
0
L 00H 01H
1
M 00H
1
L
0
00H 01H
N
00H
0
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