UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 582
UPD78F0890GK(A)-GAJ-AX
Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0890GKA-GAJ-AX.pdf
(732 pages)
Specifications of UPD78F0890GK(A)-GAJ-AX
Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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22.4.1 When used as reset
(1) When detecting level of supply voltage (V
582
• When starting operation
• When stopping operation
Either of the following procedures must be executed.
•
•
<1> Mask the LVI interrupt (LVIMK = 1).
<2> Clear bit 2 (LVISEL) of the low-voltage detection register (LVIM) to 0 (detects level of supply voltage
<3> Set the detection voltage using bits 3 to 0 (LVIS3 to LVIS0) of the low-voltage detection level selection
<4> Set bit 7 (LVION) of LVIM to 1 (enables LVI operation).
<5> Use software to wait for an operation stabilization time and minimum pulse width (10
<6> Wait until it is checked that (supply voltage (V
<7> Set bit 1 (LVIMD) of LVIM to 1 (generates reset when the level is detected).
Figure 22-5 shows the timing of the internal reset signal generated by the low-voltage detector. The numbers
in this timing chart correspond to <1> to <7> above.
Cautions 1. <1> must always be executed. When LVIMK = 0, an interrupt may occur immediately
When using 8-bit memory manipulation instruction:
Write 00H to LVIM.
When using 1-bit memory manipulation instruction:
Clear LVIMD to 0 and then LVION to 0.
(V
register (LVIS).
DD
)) (default value).
2. If supply voltage (V
after the processing in <4>.
reset signal is not generated.
CHAPTER 22 LOW-VOLTAGE DETECTOR
User’s Manual U17554EJ4V0UD
DD
) ≥ detection voltage (V
DD
)
DD
) ≥ detection voltage (V
LVI
) when LVIMD is set to 1, an internal
LVI
)) by bit 0 (LVIF) of LVIM.
μ
s (MAX.)).
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