UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 158

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

6.6.7 Condition before changing CPU clock and processing after changing CPU clock
158
Internal high-
speed oscillation
clock
X1 clock
External main
system clock
Internal high-
speed oscillation
clock
X1 clock
External main
system clock
Internal high-
speed oscillation
clock
X1 clock
External main
system clock
XT1 clock,
external
subsystem clock
Before Change
Condition before changing the CPU clock and processing after changing the CPU clock are shown below.
CPU Clock
X1 clock
External main
system clock
Internal high-
speed oscillation
clock
XT1 clock
External
subsystem clock
Internal high-
speed oscillation
clock
X1 clock
External main
system clock
After Change
Stabilization of X1 oscillation
• MSTOP = 0, OSCSEL = 1, EXCLK = 0
• After elapse of oscillation stabilization time
Enabling input of external clock from EXCLK
pin
• MSTOP = 0, OSCSEL = 1, EXCLK = 1
Oscillation of internal high-speed oscillator
• RSTOP = 0
Stabilization of XT1 oscillation
• XTSTART = 0, EXCLKS = 0,
• After elapse of oscillation stabilization time
Enabling input of external clock from
EXCLKS pin
• XTSTART = 0, EXCLKS = 1,
Oscillation of internal high-speed oscillator
and selection of internal high-speed
oscillation clock as main system clock
• RSTOP = 0, MCS = 0
Stabilization of X1 oscillation and selection
of high-speed system clock as main system
clock
• MSTOP = 0, OSCSEL = 1, EXCLK = 0
• After elapse of oscillation stabilization time
• MCS = 1
Enabling input of external clock from EXCLK
pin and selection of high-speed system
clock as main system clock
• MSTOP = 0, OSCSEL = 1, EXCLK = 1
• MCS = 1
OSCSELS = 1
OSCSELS = 1, or XTSTART = 1
CHAPTER 6 CLOCK GENERATOR
Table 6-5. Changing CPU Clock
Condition Before Change
User’s Manual U17554EJ4V0UD
• Internal high-speed oscillator can be
• Clock supply to CPU is stopped for 4.06
• Internal high-speed oscillator can be
• Clock supply to CPU is stopped for the
X1 oscillation can be stopped (MSTOP = 1).
External main system clock input can be
disabled (MSTOP = 1).
Operating current can be reduced by
stopping internal high-speed oscillator
(RSTOP = 1).
X1 oscillation can be stopped (MSTOP = 1).
External main system clock input can be
disabled (MSTOP = 1).
Operating current can be reduced by
stopping internal high-speed oscillator
(RSTOP = 1).
X1 oscillation can be stopped (MSTOP = 1).
External main system clock input can be
disabled (MSTOP = 1).
XT1 oscillation can be stopped or external
subsystem clock input can be disabled
(OSCSELS = 0).
• XT1 oscillation can be stopped or external
• Clock supply to CPU is stopped for 4.06
• XT1 oscillation can be stopped or external
• Clock supply to CPU is stopped for the
stopped (RSTOP = 1).
to 16.12
stopped (RSTOP = 1).
duration of 160 external clocks from the
EXCLK pin after AMPH has been set to 1.
subsystem clock input can be disabled
(OSCSELS = 0).
to 16.12
subsystem clock input can be disabled
(OSCSELS = 0).
duration of 160 external clocks from the
EXCLK pin after AMPH has been set to 1.
Processing After Change
μ
μ
s after AMPH has been set to 1.
s after AMPH has been set to 1.