UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 564

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

564
Cautions 1.
Cautions 1. MDA0H is cleared to 0 when an operation is started in the multiplication mode (when
(1) Remainder data register 0 (SDR0)
(2) Multiplication/division data register A0 (MDA0H, MDA0L)
Address: FF44H, FF45H
Symbol
SDR0
Address: FF4AH, FF4BH, FF4CH, FF4DH
Symbol
MDA0H
Symbol
MDA0L
SDR0 is a 16-bit register that stores a remainder. This register stores 0 in the multiplication mode and the
remainder of an operation result in the division mode.
SDR0 can be read by an 8-bit or 16-bit memory manipulation instruction.
Reset signal generation clears SDR0 to 0000H.
MDA0 is a 32-bit register that sets a 16-bit multiplier A in the multiplication mode and a 32-bit dividend in the
division mode, and stores the 32-bit result of the operation (higher 16 bits: MDA0H, lower 16 bits: MDA0L).
2. SDR0 is reset when the operation is started (when DMUE is set to 1).
2. Do not change the value of MDA0 during operation processing (while bit 7 (DMUE) of
3. The value read from MDA0 during operation processing (while DMUE is 1) is not guaranteed.
Figure 20-3. Format of Multiplication/Division Data Register A0 (MDA0H, MDA0L)
MDA
MDA
SDR
031
015
015
The value read from SDR0 during operation processing (while bit 7 (DMUE) of
multiplier/divider control register 0 (DMUC0) is 1) is not guaranteed.
multiplier/divider control register 0 (DMUC0) is set to 81H).
multiplier/divider control register 0 (DMUC0) is 1).
executed, but the result is undefined.
MDA
MDA
SDR
014
030
014
Figure 20-2. Format of Remainder Data Register 0 (SDR0)
MDA
MDA
SDR
013
029
013
After reset: 0000H
FF4DH (MDA0HH)
FF4BH (MDA0LH)
FF45H (SDR0H)
MDA
MDA
SDR
012
028
012
CHAPTER 20 MULTIPLIER/DIVIDER
MDA
MDA
SDR
011
027
011
User’s Manual U17554EJ4V0UD
After reset: 0000H, 0000H
MDA
MDA
SDR
026
010
010
R
MDA
MDA
SDR
009
025
009
MDA
MDA
SDR
008
024
008
MDA
MDA
SDR
007
023
007
MDA
MDA
SDR
R/W
006
022
006
Even in this case, the operation is
MDA
MDA
SDR
021
005
005
FF4CH (MDA0HL)
FF4AH (MDA0LL)
FF44H (SDR0L)
MDA
MDA
SDR
004
020
004
MDA
MDA
SDR
003
019
003
MDA
MDA
SDR
002
018
002
MDA
MDA
SDR
001
017
001
MDA
MDA
SDR
016
000
000