UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 252

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

9.4.2 Operation as PWM output mode
during timer operation is prohibited.
during timer operation is possible.
CMP0n register match after the timer count is started. TOHn output becomes inactive when 8-bit timer counter Hn
and the CMP1n register match.
(1) Usage
252
TMHMDn
In PWM output mode, a pulse with an arbitrary duty and arbitrary cycle can be output.
8-bit timer compare register 0n (CMP0n) controls the cycle of timer output (TOHn). Rewriting the CMP0n register
8-bit timer compare register 1n (CMP1n) controls the duty of timer output (TOHn). Rewriting the CMP1n register
The operation in PWM output mode is as follows.
TOHn output becomes active and 8-bit timer counter Hn is cleared to 0 when 8-bit timer counter Hn and the
<1> Set each register.
In PWM output mode, a pulse for which an arbitrary duty and arbitrary cycle can be set is output.
(i) Setting timer H mode register n (TMHMDn)
(ii) Setting CMP0n register
(iii) Setting CMP1n register
TMHEn
0
• Compare value (N): Cycle setting
• Compare value (M): Duty setting
Remarks 1. n = 0, 1
CKSn2
0/1
2. 00H ≤ CMP1n (M) < CMP0n (N) ≤ FFH
CKSn1
Figure 9-11. Register Setting in PWM Output Mode
0/1
CHAPTER 9 8-BIT TIMERS H0 AND H1
CKSn0
0/1
User’s Manual U17554EJ4V0UD
TMMDn1
1
TMMDn0 TOLEVn
0
0/1
TOENn
1
Timer output enabled
Timer output level inversion setting
PWM output mode selection
Count clock (f
Count operation stopped
CNT
) selection