UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 464

8BIT MCU, 128K FLASH, 7K RAM, LQFP

UPD78F0890GK(A)-GAJ-AX

Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0890GK(A)-GAJ-AX

Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
16.9.5 Multi buffer receive block function
sequentially with no CPU interaction, by setting the same ID to two or more message buffers with the same message
buffer type.
the same ID is set to each message buffer. If the first message whose ID matches the ID of the message buffers is
received, it is stored in message buffer 10. At this point, the DN bit of message buffer 10 is set, prohibiting overwriting
the message buffer when subsequent messages are received.
message with a matching ID is received, it is sequentially (in the ascending order) stored in message buffers 12, 13,
and 14. Even when a data block consisting of multiple messages is received, the messages can be stored and
received without overwriting the previously received matching-ID data.
register of each message buffer. For example, if a data block consists of k messages, k message buffers are
initialized for reception of the data block. The IE bit in message buffers 0 to (k-2) is cleared to 0 (interrupts disabled),
and the IE bit in message buffer k-1 is set to 1 (interrupts enabled). In this case, a reception completion interrupt
occurs when a message has been received and stored in message buffer k-1, indicating that MBRB has become full.
Alternatively, by clearing the IE bit of message buffers 0 to (k-3) and setting the IE bit of message buffer k-2, a
warning that MBRB is about to overflow can be issued.
of storing data in a single message buffer.
464
The multi buffer receive block (MBRB) function is used to store a block of data in two or more message buffers
Suppose, for example, the same message buffer type is set to 5 message buffers, message buffers 10 to 14, and
If the next message with a matching ID is received, it is received and stored in message buffer 11. Each time a
Whether a data block has been received and stored can be checked by setting the IE bit of the C0MCTRLm
The basic conditions of storing receive data in each message buffer for the MBRB are the same as the conditions
Cautions 1. MBRB can be configured for each of the same message buffer types. Therefore, even if a
Remark
2. MBRB does not have a ring buffer structure. Therefore, after a message is stored in the
3. MBRB operates based on the reception and storage conditions; there are no settings
4. With MBRB, "matching ID" means "matching ID after mask". Even if the ID set to each
5. The priority between MBRBs is mentioned in 16.9.1 Message Reception.
m = 0 to 15
message buffer of another MBRB whose ID matches but whose message buffer type is
different has a vacancy, the received message is not stored in that message buffer, but
instead discarded.
message buffer having the highest number in the MBRB configuration, a newly received
message will not be stored in the message buffer having the lowest message buffer
number.
dedicated to MBRB, such as function enable bits. By setting the same message buffer type
and ID to two or more message buffers, MBRB is automatically configured.
message buffer is not the same, if the ID that is masked by the mask register matches, it is
considered a matching ID and the buffer that has this ID is treated as the storage
destination of a message.
CHAPTER 16 CAN CONTROLLER
User’s Manual U17554EJ4V0UD

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