UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 470

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

16.10.3 Automatic block transmission (ABT)
CPU interaction. The maximum number of transmit message buffers assigned to the ABT function is eight (message
buffer numbers 0 to 7).
transmission function" (hereafter referred to as ABT mode) can be selected.
message buffers used for ABT, and define all the buffers as transmit message buffers by setting MT [2:0] bits to 000B.
Be sure to set the ID for each message buffer for ABT even when the same ID is being used for all the message
buffers. To use two or more IDs, set the ID of each message buffer by using the CnMIDLm and CnMIDHm registers.
Set the CnMDLCm and CnMDATA0m to CnMDATA7m registers before issuing a transmission request for the ABT
function.
TRQ bit does not have to be manipulated by software.
transmission is then started. When ABT is started, the TRQ bit in the first message buffer (message buffer 0) is
automatically set to 1. After transmission of the data of message buffer 0 has finished, TRQ bit of the next message
buffer, message buffer 1, is set automatically. In this way, transmission is executed successively.
set while successive transmission is being executed. The delay time to be inserted is defined by the CnGMABTD
register. The unit of the delay time is DBT (data bit time). DBT depends on the setting of the CnBRP and CnBTR
registers.
message buffers 0 to 7 are sequentially transmitted. When transmission of the data frame from message buffer 7 has
been completed, the ABTTRG bit is automatically cleared to 0 and the ABT operation is finished.
is stopped, and the ABTTRG bit is cleared. After that, transmission can be resumed from the message buffer where
ABT stopped, by setting the RDY and ABTTRG bits to 1 by software. To not resume transmission from the message
buffer where ABT stopped, the internal ABT engine can be reset by setting the ABTCLR bit to 1 while ABT mode is
stopped and ABTTRG bit is cleared to 0. In this case, transmission is started from message buffer 0 if the ABTCLR bit
is cleared to 0 and then the ABTTRG bit is set to 1.
do so, the IE bit of the CnMCTRLm register of each message buffer except the last message buffer needs to be
cleared (0).
transmit message buffer, the message to be transmitted next is determined by the priority of the transmission ID of the
ABT message buffer whose transmission is currently held pending and the transmission ID of the message buffers
other than those used by the ABT function.
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The automatic block transmission (ABT) function is used to transmit two or more data frames successively with no
By setting OPMODE [2:0] bits of the CnCTRL register to 010B, "normal operation mode with automatic block
To issue an ABT transmission request, define the message buffers by software first. Set the MA0 bit (1) in all the
After initialization of message buffers for ABT is finished, the RDY bit needs to be set (1). In the ABT mode, the
After the data for the ABT message buffers has been prepared, set the ABTTRG bit to 1. Automatic block
A delay time can be inserted by program in the interval in which the transmission request (TRQ) is automatically
Among transmit objects within the ABT-area, the priority of the transmission ID is not evaluated. The data of
If the RDY bit of an ABT message buffer is cleared during ABT, no data frame is transmitted from that buffer, ABT
An interrupt can be used to check if data frames have been transmitted from all the message buffers for ABT. To
If a transmit message buffer other than those used by the ABT function (message buffer 8 to 15) is assigned to a
Transmission of a data frame from an ABT message buffer is not recorded in the transmit history list (THL).
CHAPTER 16 CAN CONTROLLER
User’s Manual U17554EJ4V0UD