UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 231
UPD78F0890GK(A)-GAJ-AX
Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0890GKA-GAJ-AX.pdf
(732 pages)
Specifications of UPD78F0890GK(A)-GAJ-AX
Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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8.4 Operations of 8-Bit Timer/Event Counters 50 and 51
8.4.1 Operation as interval timer
of the count value preset to 8-bit timer compare register 5n (CR5n).
TM5n value cleared to 0 and an interrupt request signal (INTTM5n) is generated.
(TCL5n).
8-bit timer/event counter 5n operates as an interval timer that generates interrupt requests repeatedly at intervals
When the count value of 8-bit timer counter 5n (TM5n) matches the value set to CR5n, counting continues with the
The count clock of TM5n can be selected with bits 0 to 2 (TCL5n0 to TCL5n2) of timer clock selection register 5n
<1> Set the registers.
<2> After TCE5n = 1 is set, the count operation starts.
<3> If the values of TM5n and CR5n match, INTTM5n is generated (TM5n is cleared to 00H).
<4> INTTM5n is generated repeatedly at the same interval.
Remark Interval time = (N + 1) × t
Setting
TM5n count value
Caution Do not write other values to CR5n during operation.
• TCL5n:
• CR5n:
• TMC5n:
Set TCE5n to 0 to stop the count operation.
Count clock
INTTM5n
TCE5n
N = 00H to FFH
n = 0, 1
CR5n
Select the count clock.
Compare value
Stop the count operation, select the mode in which clear & start occurs on a match of TM5n
and CR5n.
(TMC5n = 0000×××0B × = Don’t care)
Count start
00H
N
CHAPTER 8 8-BIT TIMER/EVENT COUNTERS 50 AND 51
01H
Figure 8-11. Interval Timer Operation Timing (1/2)
t
User’s Manual U17554EJ4V0UD
(a) Basic operation
N
Clear
00H
Interrupt acknowledged
N
01H
Interval time
N
Clear
00H
Interrupt acknowledged
N
01H
Interval time
N
N
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