UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 203

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

(3) Pulse width measurement with free-running counter and two capture registers
Remark 0/1: Setting 0 or 1 allows another function to be used simultaneously with pulse width measurement.
When 16-bit timer counter 0n (TM0n) is operated in free-running mode, it is possible to measure the pulse width
of the signal input to the TI00n pin.
When the rising or falling edge specified by bits 4 and 5 (ES0n0 and ES0n1) of prescaler mode register 0n
(PRM0n) is input to the TI00n pin, the value of TM0n is taken into 16-bit timer capture/compare register 01n
(CR01n) and an interrupt request signal (INTTM01n) is set.
Also, when the inverse edge to that of the capture operation is input into CR01n, the value of TM0n is taken into
16-bit timer capture/compare register 00n (CR00n).
Sampling is performed using the count clock cycle selected by prescaler mode register 0n (PRM0n), and a
capture operation is only performed when a valid level of the TI00n pin is detected twice, thus eliminating noise
with a short pulse width.
Figure 7-40. Control Register Settings for Pulse Width Measurement with Free-Running Counter and
PRM0n
n = 0 to 3
TMC0n
CRC0n
See the description of the respective control registers for details.
Two Capture Registers (with Rising Edge Specified)
ES1n1
0/1
7
0
7
0
ES1n0
0/1
6
0
6
0
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 TO 03
(a) 16-bit timer mode control register 0n (TMC0n)
(b) Capture/compare control register 0n (CRC0n)
ES0n1
5
0
5
0
0
(c) Prescaler mode register 0n (PRM0n)
ES0n0
4
0
4
0
1
User’s Manual U17554EJ4V0UD
TMC0n3
0
3
0
3
0
TMC0n2
CRC0n2
1
1
2
0
TMC0n1
CRC0n1
PRM0n1
0/1
0/1
1
OVF0n
CRC0n0
PRM0n0
0/1
0
1
Free-running mode
Selects count clock (setting “11” is prohibited).
Specifies rising edge for pulse width detection.
Setting invalid (setting “10” is prohibited.)
CR00n used as capture register
Captures to CR00n at inverse edge
to valid edge of TI00n.
CR01n used as capture register
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