UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 259

8BIT MCU, 128K FLASH, 7K RAM, LQFP

UPD78F0890GK(A)-GAJ-AX

Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0890GK(A)-GAJ-AX

Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
To control the carrier pulse output during a count operation, the NRZ1 and NRZB1 bits of the TMCYC1 register
have a master and slave bit configuration. The NRZ1 bit is read-only but the NRZB1 bit can be read and written.
The INTTM51 signal is synchronized with the 8-bit timer H1 count clock and output as the INTTM5H1 signal. The
INTTM5H1 signal becomes the data transfer signal of the NRZ1 bit, and the NRZB1 bit value is transferred to the
NRZ1 bit. The timing for transfer from the NRZB1 bit to the NRZ1 bit is as shown below.
<1> The INTTM51 signal is synchronized with the count clock of 8-bit timer H1 and is output as the INTTM5H1
<2> The value of the NRZB1 bit is transferred to the NRZ1 bit at the second clock from the rising edge of the
Cautions 1. Do not rewrite the NRZB1 bit again until at least the second clock after it has been
signal.
INTTM5H1 signal.
2. When 8-bit timer/event counter 51 is used in the carrier generator mode, an interrupt is
rewritten, or else the transfer from the NRZB1 bit to the NRZ1 bit is not guaranteed.
generated at the timing of <1>. When 8-bit timer/event counter 51 is used in a mode other
than the carrier generator mode, the timing of the interrupt generation differs.
8-bit timer H1
INTTM5H1
count clock
INTTM51
TMHE1
NRZB1
RMC1
NRZ1
CHAPTER 9 8-BIT TIMERS H0 AND H1
0
Figure 9-13. Transfer Timing
<1>
User’s Manual U17554EJ4V0UD
1
<2>
1
0
0
1
259

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