UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 166
UPD78F0890GK(A)-GAJ-AX
Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0890GKA-GAJ-AX.pdf
(732 pages)
Specifications of UPD78F0890GK(A)-GAJ-AX
Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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(2) 16-bit timer capture/compare register 00n (CR00n)
166
CR00n is a 16-bit register that has the functions of both a capture register and a compare register. Whether it is
used as a capture register or as a compare register is set by bit 0 (CRC0n0) of capture/compare control register
0n (CRC0n).
CR00n can be set by a 16-bit memory manipulation instruction.
Reset signal generation clears this register to 0000H.
• When CR00n is used as a compare register
• When CR00n is used as a capture register
The value set in CR00n is constantly compared with 16-bit timer counter 0n (TM0n) count value, and an
interrupt request (INTTM00n) is generated if they match. The set value is held until CR00n is rewritten.
It is possible to select the valid edge of the TI00n pin or the TI01n pin as the capture trigger. The TI00n or
TI01n pin valid edge is set using prescaler mode register 0n (PRM0n) (see Table 7-2).
Caution CR00n does not perform the capture operation when it is set in the comparison mode, even
(n = 0 to 3)
Address: FF12H, FF13H (CR000), FFB2H, FFB3H (CR001)
Symbol
CR00n
Figure 7-6. Format of 16-Bit Timer Capture/Compare Register 00n (CR00n)
if a capture trigger is input to it.
FF6CH, FF6DH (CR002), FFA8H, FFA9H (CR003)
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 TO 03
FFB3H (CR001)
FF6DH (CR002)
FFA9H (CR003)
FF13H (CR000)
User’s Manual U17554EJ4V0UD
After reset: 0000H
FFB2H (CR001)
FF6CH (CR002)
FFA8H (CR003)
FF12H (CR000)
R/W
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