UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 257

8BIT MCU, 128K FLASH, 7K RAM, LQFP

UPD78F0890GK(A)-GAJ-AX

Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0890GK(A)-GAJ-AX

Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
8-bit timer counter Hn
<1> The count operation is enabled by setting TMHEn = 1. Start 8-bit timer counter Hn by masking one count
<2> The CMP1n register value can be changed during timer counter operation. This operation is asynchronous
<3> When the values of 8-bit timer counter Hn and the CMP0n register match, the value of 8-bit timer counter Hn
<4> If the CMP1n register value is changed, the value is latched and not transferred to the register. When the
<5> When the values of 8-bit timer counter Hn and the CMP1n register after the change match, the TOHn output
<6> Clearing the TMHEn bit to 0 during timer Hn operation makes the INTTMHn signal and TOHn output inactive.
Remark n = 0, 1
(TOLEVn = 0)
Count clock
clock to count up. At this time, the TOHn output remains inactive (when TOLEVn = 0).
to the count clock.
is cleared, the TOHn output becomes active, and the INTTMHn signal is output.
values of 8-bit timer counter Hn and the CMP1n register before the change match, the value is transferred to
the CMP1n register and the CMP1n register value is changed (<2>’).
However, three count clocks or more are required from when the CMP1n register value is changed to when
the value is transferred to the register. If a match signal is generated within three count clocks, the changed
value cannot be transferred to the register.
becomes inactive. 8-bit timer counter Hn is not cleared and the INTTMHn signal is not generated.
INTTMHn
TMHEn
CMP0n
CMP1n
TOHn
(e) Operation by changing CMP1n (CMP1n = 01H → 03H, CMP0n = A5H)
00H 01H 02H
<1>
Figure 9-12. Operation Timing in PWM Output Mode (4/4)
01H
CHAPTER 9 8-BIT TIMERS H0 AND H1
<2>
A5H 00H 01H 02H 03H
User’s Manual U17554EJ4V0UD
<3>
01H (03H)
<2>'
<4>
A5H
03H
A5H 00H 01H 02H 03H
<5>
A5H 00H
<6>
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