UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 172

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

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Note The TI000 pin valid edge is set by bits 5 and 4 (ES001, ES000) of prescaler mode register 00 (PRM00).
Remark TO00: 16-bit timer/event counter 00 output pin
Address: FFBAH
Symbol
TMC00
TI000: 16-bit timer/event counter 00 input pin
TM00: 16-bit timer counter 00
CR000: 16-bit timer capture/compare register 000
CR010: 16-bit timer capture/compare register 010
OVF00 is set to 1 when the value of TM00 changes from FFFFH to 0000H in all the operation modes (free-running
timer mode, clear & start mode entered by TI000 pin valid edge input, and clear & start mode entered upon a match
between TM00 and CR000).
It can also be set to 1 by writing 1 to OVF00.
Clear (0)
TMC003
TMC001
OVF00
Set (1)
0
0
1
1
0
1
Figure 7-8. Format of 16-Bit Timer Mode Control Register 00 (TMC00)
7
0
After reset: 00H
• Match between TM00 and CR000 or match between TM00 and CR010
• Match between TM00 and CR000 or match between TM00 and CR010
• Trigger input of TI000 pin valid edge
Clears OVF00 to 0 or TMC003 and TMC002 = 00
Overflow occurs.
TMC002
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 TO 03
0
1
0
1
6
0
Disables 16-bit timer/event counter 00 operation. Stops supplying operating clock.
Clears 16-bit timer counter 00 (TM00).
Free-running timer mode
Clear & start mode entered by TI000 pin valid edge input
Clear & start mode entered upon a match between TM00 and CR000
R/W
User’s Manual U17554EJ4V0UD
5
0
Condition to reverse timer output (TO00)
Operation enable of 16-bit timer/event counter 00
4
0
TM00 overflow flag
TMC003
3
TMC002
2
Note
TMC001
1
OVF00
<0>