UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 499
UPD78F0890GK(A)-GAJ-AX
Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0890GKA-GAJ-AX.pdf
(732 pages)
Specifications of UPD78F0890GK(A)-GAJ-AX
Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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Cautions 1. The TRQ bit should be set after the RDY bit is set.
Remark Also check the MBON flag at the beginning and at the end of the interrupt routine, in order to check
Set C0MDATAxm register
Set C0MDLCm register,
Clear RTR bit of C0MCONFm
register.
Set C0MIDLm and C0MIDHm
registers
2. The RDY bit and TRQ bit should not be set at the same time.
the access to the message buffers as well as TX history list registers, in case a pending sleep mode
had been executed. If MBON is detected to be cleared at any check, the actions and results of the
processing have to be discarded and processed again, after MBON is set again.
It is recommended to cancel any sleep mode requests, before processing TX interrupts.
Figure 16-44. Transmission via Interrupt (Using C0LOPT register)
Data frame
CHAPTER 16 CAN CONTROLLER
Data frame or remote frame?
User’s Manual U17554EJ4V0UD
Read C0LOPT register
Transmit completion
interrupt processing
Clear RDY bit
Set RDY bit
Set TRQ bit
RDY = 0?
START
END
Yes
No
Set C0MDLCm register
Set RTR bit of C0MCONFm
register.
Set C0MIDLm and C0MIDHm
registers
Remote frame
499
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