UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 578

8BIT MCU, 128K FLASH, 7K RAM, LQFP

UPD78F0890GK(A)-GAJ-AX

Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0890GK(A)-GAJ-AX

Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
22.2 Configuration of Low-Voltage Detector
22.3 Registers Controlling Low-Voltage Detector
578
V
DD
The block diagram of the low-voltage detector is shown in Figure 22-1.
The low-voltage detector is controlled by the following registers.
• Low-voltage detection register (LVIM)
• Low-voltage detection level selection register (LVIS)
• Port mode register 12 (PM12)
Low-voltage detection level
selection register (LVIS)
EXLVI/P120/
INTP0
Figure 22-1. Block Diagram of Low-Voltage Detector
CHAPTER 22 LOW-VOLTAGE DETECTOR
User’s Manual U17554EJ4V0UD
Reference
voltage
source
Internal bus
N-ch
+
V
DD
Low-voltage detection register
(LVIM)
Internal reset signal
INTLVI

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