UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 220

8BIT MCU, 128K FLASH, 7K RAM, LQFP

UPD78F0890GK(A)-GAJ-AX

Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0890GK(A)-GAJ-AX

Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
(7) Operation of OVF0n flag
(8) One-shot pulse output
220
(a) Setting OVF0n flag (1)
(b) Clearing OVF0n flag
One-shot pulse output operates correctly in the free-running timer mode or the clear & start mode entered by the
TI00n pin valid edge. The one-shot pulse cannot be output in the clear & start mode entered upon a match
between TM0n and CR00n.
Remark n = 0 to 3
The OVF0n flag is set to 1 in the following case, as well as when TM0n overflows.
Select the clear & start mode entered upon a match between TM0n and CR00n.
Set CR00n to FFFFH.
When TM0n matches CR00n and TM0n is cleared from FFFFH to 0000H
Even if the OVF0n flag is cleared to 0 after TM0n overflows and before the next count clock is counted
(before the value of TM0n becomes 0001H), it is set to 1 again and clearing is invalid.
Count pulse
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 TO 03
INTTM00n
OVF0n
CR00n
TM0n
Figure 7-57. Operation Timing of OVF0n Flag
FFFFH
FFFEH
User’s Manual U17554EJ4V0UD
FFFFH
0000H
0001H

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