UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 317
UPD78F0890GK(A)-GAJ-AX
Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0890GKA-GAJ-AX.pdf
(732 pages)
Specifications of UPD78F0890GK(A)-GAJ-AX
Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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Address: FF2EH After reset: 01H R/W
ASIM60
Notes 1.
Symbol
Figure 14-7. Format of Asynchronous Serial Interface Operation Mode Register 60 (ASIM60) (1/2)
2.
POWER60
POWER60
The output of the T
level when POWER60 = 0 during transmission.
Asynchronous serial interface reception error status register 60 (ASIS60), asynchronous serial
interface transmission status register 60 (ASIF60), bit 7 (SBRF60) and bit 6 (SBRT60) of asynchronous
serial interface control register 60 (ASICL60), and receive buffer register 60 (RXB60) are reset.
RXE60
TXE60
0
<7>
Note 1
1
0
1
0
1
Disables operation of the internal operation clock (fixes the clock to low level) and asynchronously
resets the internal circuit
Enables operation of the internal operation clock
Disables transmission (synchronously resets the transmission circuit).
Enables transmission
Disables reception (synchronously resets the reception circuit).
Enables reception
TXE60
CHAPTER 14 SERIAL INTERFACES UART60 AND UART61
<6>
X
D60 pins goes high level and the input from the R
RXE60
<5>
User’s Manual U17554EJ4V0UD
Enables/disables operation of internal operation clock
Note 2
.
PS610
4
Enables/disables transmission
Enables/disables reception
PS600
3
CL60
2
X
D60 pins is fixed to the high
SL60
1
ISRM60
0
317
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