EP3C25F324I7 Altera, EP3C25F324I7 Datasheet - Page 131

• Manufacturer Part Number: EP3C25F324I7
• Description: IC CYCLONE III FPGA 25K 324 FBGA
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C25F324I7

• Number Of Logic Elements/cells: 24624
• Number Of Labs/clbs: 1539
• Total Ram Bits: 608256
• Number Of I /o: 215
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 324-FBGA
• Family Name: Cyclone III
• Number Of Logic Blocks/elements: 24624
• # I/os (max): 215
• Frequency (max): 437.5MHz
• Process Technology: 65nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 24624
• Ram Bits: 608256
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Package Type: FBGA
• For Use With: 544-2370 - KIT STARTER CYCLONE III EP3C25
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant

Chapter 7: High-Speed Differential Interfaces in the Cyclone III Device Family
High-Speed I/O Standards Support
High-Speed I/O Standards Support
LVDS I/O Standard Support in the Cyclone III Device Family
© December 2009
f
Altera Corporation
Table 7–4
Cyclone III LS devices.
Table 7–4. Cyclone III LS Devices Migratable Differential Channels
This section provides information about the high-speed I/O standards supported in
the Cyclone III device family.
The LVDS I/O standard is a high-speed, low-voltage swing, low power, and general
purpose I/O interface standard. The Cyclone III device family meets the
ANSI/TIA/EIA-644 standard with the following exceptions:
■
■
For more information about the LVDS I/O standard electrical specifications in the
Cyclone III device family, refer to the
Device Data Sheet
Note to
(1) The migratable differential channels for Cyclone III devices are not directly migratable to Cyclone III LS devices
Package
The maximum differential output voltage (V
maximum V
The input voltage range is reduced to the range of 1.0 V to 1.6 V, 0.5 V to 1.85 V, or
0 V to 1.8 V based on different frequency ranges. The ANSI/TIA/EIA-644
specification supports an input voltage range of 0 V to 2.4 V.
U484
Type
F484
F780
and vice versa.
Table
lists the numbers of differential channels that can be migrated in
7–4:
EP3CLS70 and EP3CLS100
EP3CLS70 and EP3CLS100
EP3CLS70 and EP3CLS150
EP3CLS70 and EP3CLS200
EP3CLS100 and EP3CLS150
EP3CLS100 and EP3CLS200
EP3CLS150 and EP3CLS200
EP3CLS70 and EP3CLS100
EP3CLS70 and EP3CLS150
EP3CLS70 and EP3CLS200
EP3CLS100 and EP3CLS150
EP3CLS100 and EP3CLS200
EP3CLS150 and EP3CLS200
Migration between Devices
OD
chapters.
for ANSI specification is 450 mV.
Cyclone III Device Data Sheet
User I/O
101
101
169
169
169
169
169
169
71
71
71
71
75
OD
) is increased to 600 mV. The
Migratable Channels
Clock
Input
Cyclone III Device Handbook, Volume 1
(Note 1)
8
8
8
8
8
8
8
8
8
8
8
8
8
and
Output
Clock
4
4
4
4
4
4
4
4
4
4
4
4
4
Cyclone III LS
Total
113
113
181
181
181
181
181
181
83
83
87
83
83
7–7