EP3C25F324I7 Altera, EP3C25F324I7 Datasheet - Page 242

IC CYCLONE III FPGA 25K 324 FBGA

EP3C25F324I7

Manufacturer Part Number
EP3C25F324I7
Description
IC CYCLONE III FPGA 25K 324 FBGA
Manufacturer
Altera
Series
Cyclone® IIIr

Specifications of EP3C25F324I7

Number Of Logic Elements/cells
24624
Number Of Labs/clbs
1539
Total Ram Bits
608256
Number Of I /o
215
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
324-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
24624
# I/os (max)
215
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
24624
Ram Bits
608256
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Package Type
FBGA
For Use With
544-2370 - KIT STARTER CYCLONE III EP3C25
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant

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9–82
Dedicated Remote System Upgrade Circuitry
Cyclone III Device Handbook, Volume 1
This section explains the implementation of the Cyclone III device family remote
system upgrade dedicated circuitry. The remote system upgrade circuitry is
implemented in hard logic. This dedicated circuitry interfaces to the user-defined
factory application configurations implemented in the Cyclone III device family logic
array to provide the complete remote configuration solution. The remote system
upgrade circuitry contains the remote system upgrade registers, a watchdog timer,
and state machines that control those components.
the remote system upgrade block.
Figure 9–35. Remote System Upgrade Circuit Data Path
Notes to
(1) RU_DOUT, RU_SHIFTnLD, RU_CAPTnUPDT, RU_CLK, RU_DIN,RU_nCONFIG, and RU_nRSTIMER signals
(2) RU_CLK refers to ALTREMOTE_UPDATE megafunction block "clock" input. For more information, refer to the
are internally controlled by the ALTREMOTE_UPDATE megafunction.
Remote Update Circuitry (ALTREMOTE_UPDATE) Megafunction User
Previous
State
Register 2
Bit[30..0]
Figure
Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
RU_DIN
9–35:
Status Register (SR)
Previous
State
Register 1
Bit[30..0]
din
RU_SHIFTnLD
Bit [40..39]
Logic
Current
State
Logic
Bit[31..0]
Shift Register
RU_CAPTnUPDT
dout
din
Logic Array
Bit [38..0]
Update Register
Bit [38..0]
Control Register
Bit [38..0]
Logic
clkout
capture
update
capture
dout
Logic
RU_CLK (2)
clkin
update
(Note 1)
Figure 9–35
Guide.
RU_DOUT
© December 2009 Altera Corporation
Internal Oscillator
RSU
Reconfiguration
State
Machine
RSU
Master
State
Machine
RU_nCONFIG
shows the data path of
Remote System Upgrade
timeout
RU_nRSTIMER
User
Watchdog
Timer

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