EP3C25F324I7 Altera, EP3C25F324I7 Datasheet - Page 235

• Manufacturer Part Number: EP3C25F324I7
• Description: IC CYCLONE III FPGA 25K 324 FBGA
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C25F324I7

• Number Of Logic Elements/cells: 24624
• Number Of Labs/clbs: 1539
• Total Ram Bits: 608256
• Number Of I /o: 215
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 324-FBGA
• Family Name: Cyclone III
• Number Of Logic Blocks/elements: 24624
• # I/os (max): 215
• Frequency (max): 437.5MHz
• Process Technology: 65nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 24624
• Ram Bits: 608256
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Package Type: FBGA
• For Use With: 544-2370 - KIT STARTER CYCLONE III EP3C25
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant

Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
Design Security
Cyclone III LS Design Security Solution
© December 2009
f
f
Altera Corporation
For more information about the battery specifications, refer to the
Data Sheet
Cyclone III LS devices are SRAM-based devices. To provide design security,
Cyclone III LS devices require a 256-bit volatile key for configuration bitstream
encryption.
The Cyclone III LS design security feature provides routing architecture optimization
for design separation flow with the Quartus II software. Design separation flow
achieves both physical and functional isolation between design partitions.
For more information about the design separation flow, refer to
Design Separation Flow.
You can carry out secure configuration in Steps 1–3, as shown in
1. Generate the encryption key programming file and encrypt the configuration data.
2. Program the volatile key into the Cyclone III LS device.
3. Configure the Cyclone III LS device.
Figure 9–31. Cyclone III LS Secure Configuration Flow
Note to
(1) Step 1, Step 2, and Step 3 correspond to the procedure detailed in
The Quartus II configuration software uses the user-defined 256-bit volatile keys
to generate a key programming file and an encrypted configuration file. The
encrypted configuration file is stored in an external memory, such as a flash
memory or a configuration device.
Program the user-defined 256-bit volatile keys into the Cyclone III LS device
through the JTAG interface.
At system power-up, the external memory device sends the encrypted
configuration file to the Cyclone III LS device.
Figure
Step 1. Generate the Encryption Key Programming File
Configuration
Data
chapter.
9–31:
Encrypt Configuration Data and Store in External Memory
Quartus II
Volatile Key
Encryptor
AES
Programming File
Configuration
Encryption Key
Encrypted
Data
Configuration
Encrypted
Memory
Storage
Data
(Note 1)
“Cyclone III LS Design Security
Configuration
Step 2. Program Volatile Key into
Cyclone III LS Device
Encrypted
Step 3. Configure the Cyclone III LS Device
Using Encrypted Configuration Data
Data
Cyclone III Device Handbook, Volume 1
AN 567: Quartus II
Figure
Key Storage
Volatile Key
Cyclone III LS Device
Decryptor
Volatile
FPGA
AES
9–31:
Solution”.
9–75