EP3C25F324I7 Altera, EP3C25F324I7 Datasheet - Page 161

IC CYCLONE III FPGA 25K 324 FBGA

EP3C25F324I7

Manufacturer Part Number
EP3C25F324I7
Description
IC CYCLONE III FPGA 25K 324 FBGA
Manufacturer
Altera
Series
Cyclone® IIIr

Specifications of EP3C25F324I7

Number Of Logic Elements/cells
24624
Number Of Labs/clbs
1539
Total Ram Bits
608256
Number Of I /o
215
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
324-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
24624
# I/os (max)
215
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
24624
Ram Bits
608256
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Package Type
FBGA
For Use With
544-2370 - KIT STARTER CYCLONE III EP3C25
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant

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© December 2009
CIII51016-1.2
Altera Corporation
This chapter describes the configuration, design security, and remote system
upgrades in Cyclone
Cyclone III LS devices) uses SRAM cells to store configuration data. Configuration
data must be downloaded to Cyclone III device family each time the device powers
up because SRAM memory is volatile.
The Cyclone III device family is configured using one of the following configuration
schemes:
All configuration schemes use an external configuration controller (for example,
MAX
The Cyclone III device family offers the following configuration features:
As Cyclone III LS devices play a role in larger and more critical designs in competitive
commercial and military environments, it is increasingly important to protect your
designs from copying, reverse engineering, and tampering. Cyclone III LS devices
address these concerns with 256-bit advanced encryption standard (AES)
programming file encryption and anti-tamper feature support to prevent tampering.
For more information about the design security feature in Cyclone III LS devices, refer
to
System designers face difficult challenges such as shortened design cycles, evolving
standards, and system deployments in remote locations. The Cyclone III device
family helps overcome these challenges with inherent re-programmability and
dedicated circuitry to perform remote system upgrades. Remote system upgrades
help deliver feature enhancements and bug fixes without costly recalls, reduce
time-to-market, and extend product life. Remote system upgrades can also be
implemented with the advanced Cyclone III device family features such as real-time
decompression of configuration data. For more information about the remote system
upgrade feature in Cyclone III device family, refer to
page
This chapter describes the Cyclone III device family configuration features and
describes how to configure Cyclone III device family using the supported
configuration schemes. This chapter also includes configuration pin descriptions and
the Cyclone III device family configuration file formats. In this chapter, the generic
term “device” includes all Cyclone III device family.
“Design Security” on page
Fast Active serial (AS)
Active parallel (AP) for Cyclone III devices only
Passive serial (PS)
Fast passive parallel (FPP)
Joint Test Action Group (JTAG)
Configuration data decompression
Design security (for Cyclone III LS devices only)
Remote system upgrade
9–77.
®
II devices or a microprocessor), a configuration device, or a download cable.
®
III devices. The Cyclone III device family (Cyclone III and
9. Configuration, Design Security, and
9–73.
Remote System Upgrades in the
Cyclone III Device Family
“Remote System Upgrade” on
Cyclone III Device Handbook, Volume 1

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