ds2156gn Maxim Integrated Products, Inc., ds2156gn Datasheet - Page 100

• Manufacturer Part Number: ds2156gn
• Description: Ds2156, Ds2156l, Ds2156ln T1/e1/j1 Single-chip Transceiver Tdm/utopia Ii Interface
• Manufacturer: Maxim Integrated Products, Inc.

15.2.2
In E1 CAS mode, the CAS signaling alignment/alarm byte can be sourced from the transmit signaling
registers along with the signaling data.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Upper CAS Align/Alarm Word (UCAW). Selects the upper CAS align/alarm pattern (0000) to be sourced
from the upper 4 bits of the TS1 register.
Bits 1 to 7/Software Signaling-Insertion Enable for Channels 1 to 7 (CH1 to CH7). These bits determine
which channels are to have signaling inserted from the transmit signaling registers.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 7/Software Signaling Insertion Enable for Channels 8 to 15 (CH8 to CH15). These bits determine
which channels are to have signaling inserted from the transmit signaling registers.
0 = do not source the upper CAS align/alarm pattern from the TS1 register
1 = source the upper CAS align/alarm pattern from the TS1 register
0 = do not source signaling data from the TSx registers for this channel
1 = source signaling data from the TSx registers for this channel
0 = do not source signaling data from the TSx registers for this channel
1 = source signaling data from the TSx registers for this channel
Software Signaling Insertion-Enable Registers, E1 CAS Mode
CH15
CH7
7
7
0
0
CH14
CH6
SSIE1
Software Signaling Insertion Enable 1
08h
SSIE2
Software Signaling Insertion Enable 2
09h
6
0
6
0
CH13
CH5
5
0
5
0
CH12
CH4
4
0
4
0
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CH11
CH3
3
0
3
0
CH10
CH2
2
0
2
0
CH1
CH9
1
0
1
0
UCAW
CH8
0
0
0
0