ds2156gn Maxim Integrated Products, Inc., ds2156gn Datasheet - Page 82

• Manufacturer Part Number: ds2156gn
• Description: Ds2156, Ds2156l, Ds2156ln T1/e1/j1 Single-chip Transceiver Tdm/utopia Ii Interface
• Manufacturer: Maxim Integrated Products, Inc.

13.
The DS2156 contains four counters that are used to accumulate line-coding errors, path errors, and
synchronization errors. Counter update options include one-second boundaries, 42ms (T1 mode only),
62ms (E1 mode only), or manual. See Error-Counter Configuration Register (ERCNT). When updated
automatically, the user can use the interrupt from the timer to determine when to read these registers. All
four counters saturate at their respective maximum counts, and they do not roll over. Note: Only the line-
code violation count register has the potential to overflow, but the bit error would have to exceed 10E-2
before this would occur.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/T1 Line-Code Violation Count Register Function Select (LCVCRF)
Bit 1/Multiframe Out-of-Sync Count Register Function Select (MOSCRF)
Bit 2/PCVCR Fs-Bit Error-Report Enable (FSBE)
Bit 3/E1 Line-Code Violation Count Register Function Select (VCRFS)
Bit 4/Error-Accumulation Mode Select (EAMS)
Bit 5/Error-Counter Update Select (ECUS)
Bit 6/Manual Error-Counter Update (MECU). When enabled by ERCNT.4, the changing of this bit from a 0 to
a 1 allows the next clock cycle to load the error-counter registers with the latest counts and reset the counters. The
user must wait a minimum of 1.5 RCLK clock periods before reading the error count registers to allow for proper
update.
Bit 7/Unused, must be set to 0 for proper operation
0 = do not count excessive 0s
1 = count excessive 0s
0 = count errors in the framing bit position
1 = count the number of multiframes out-of-sync
0 = do not report bit errors in Fs-bit position; only Ft-bit position
1 = report bit errors in Fs-bit position as well as Ft-bit position
0 = count bipolar violations (BPVs)
1 = count code violations (CVs)
0 = ERCNT.5 determines accumulation time
1 = ERCNT.6 determines accumulation time
T1 Mode:
0 = update error counters once a second
1 = update error counters every 42ms (333 frames)
E1 Mode:
0 = update error counters once a second
1 = update error counters every 62.5ms (500 frames)
ERROR COUNT REGISTERS
—
7
0
MECU
ERCNT
Error-Counter Configuration Register
41h
6
0
ECUS
5
0
EAMS
4
0
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VCRFS
3
0
FSBE
2
0
MOSCRF
1
0
LCVCRF
0
0