ds2156gn Maxim Integrated Products, Inc., ds2156gn Datasheet - Page 136

• Manufacturer Part Number: ds2156gn
• Description: Ds2156, Ds2156l, Ds2156ln T1/e1/j1 Single-chip Transceiver Tdm/utopia Ii Interface
• Manufacturer: Maxim Integrated Products, Inc.

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Receive SS7 Fill-In Signal Unit Delete (RSFD)
Bits 1 to 5/Unused, must be set to 0 or proper operation
Bit 6/Receive HDLC Mapping Select (RHMS)
Bit 7/Receive HDLC Reset (RHR). Resets the receive HDLC controller and flushes the receive FIFO. Must be
cleared and set again for a subsequent reset.
0 = normal operation; all FISUs are stored in the receive FIFO and reported to the host.
1 = When a consecutive FISU having the same BSN the previous FISU is detected, it is deleted without
host intervention.
0 = receive HDLC assigned to channels
1 = receive HDLC assigned to FDL (T1 mode), Sa bits (E1 mode)
0 = normal operation
1 = reset receive HDLC controller and flush the receive FIFO
RHR
7
0
RHMS
H1RC, H2RC
HDLC #1 Receive Control
HDLC #2 Receive Control
31h, 32h
6
0
—
5
0
—
4
0
136 of 265
—
3
0
—
2
0
—
1
0
RSFD
0
0