ds2156gn Maxim Integrated Products, Inc., ds2156gn Datasheet - Page 234

• Manufacturer Part Number: ds2156gn
• Description: Ds2156, Ds2156l, Ds2156ln T1/e1/j1 Single-chip Transceiver Tdm/utopia Ii Interface
• Manufacturer: Maxim Integrated Products, Inc.

34.
34.1 T1 Mode
Figure 34-1. Receive-Side D4 Timing
Note 1: RSYNC in the frame mode (IOCR1.5 = 0) and double-wide frame sync is not enabled (IOCR1.6 = 0).
Note 2: RSYNC in the frame mode (IOCR1.5 = 0) and double-wide frame sync is enabled (IOCR1.6 = 1).
Note 3: RSYNC in the multiframe mode (IOCR1.5 = 1).
Note 4: RLINK data (Fs bits) is updated one bit prior to even frames and held for two frames.
Figure 34-2. Receive-Side ESF Timing
Note 1: RSYNC in frame mode (IOCR1.4 = 0) and double-wide frame sync is not enabled (IOCR1.6 = 0).
Note 2: RSYNC in frame mode (IOCR1.4 = 0) and double-wide frame sync is enabled (IOCR1.6 = 1).
Note 3: RSYNC in multiframe mode (IOCR1.4 = 1).
Note 4: ZBTSI mode disabled (T1RCR2.2 = 0).
Note 5: RLINK data (FDL bits) is updated one bit time before odd frames and held for two frames.
Note 6: ZBTSI mode is enabled (T1RCR2.2 = 1).
Note 7: RLINK data (Z bits) is updated one bit time before odd frames and held for four frames.
RFSYNC
FRAME#
RFSYNC
RSYNC
RLCLK
RSYNC
TLCLK
FRAME#
RSYNC
RSYNC
RSYNC
RSYNC
RLINK
RLINK
RLCLK
TLINK
FUNCTIONAL TIMING DIAGRAMS
4
5
6
4
3
1
2
3
7
1
2
1
1
2
3
2
4
5
3
6
4
7
8
5
9 10 11 12
6
7
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8
9
10
11
12
1
2
3
2
4
3
4
5
5