ds2156gn Maxim Integrated Products, Inc., ds2156gn Datasheet - Page 182

• Manufacturer Part Number: ds2156gn
• Description: Ds2156, Ds2156l, Ds2156ln T1/e1/j1 Single-chip Transceiver Tdm/utopia Ii Interface
• Manufacturer: Maxim Integrated Products, Inc.

24.7 Register Definitions
The CCR2 register is used to configure the UTOPIA port address. The upper five bits of the CCR2
register contain the port address 0–31. The lower three bits are used for the backplane clock function. See
Programmable Backplane Clock Synthesizer in Section 30.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/BPEN. See Section 30 for more information.
Bit 1/BPCS0. See Section 30 for more information.
Bit 2/BPCS1. See Section 30 for more information.
Bits 3 to 7/Transmit and Receive Port Address 0 to 4 (TRPA0 to TRPA4). The 5-bit value in this register is
used to assign the UTOPIA interface 1 of 32 port addresses.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Transmit Port Configuration (TPC)
Bit 1/Transmit Poll Mode (TPM). Transmit UTOPIA polling mode configuration
Bits 2 to 7/Unassigned, must be set to 0 for proper operation
0 = T1 mode
1 = E1 mode
0 = multiplexed with 1CLAV mode
1 = direct status
TRPA4
—
7
7
0
0
TRPA3
—
CCR2
Common Control Register 2
71h
U_TCFR
UTOPIA Transmit Configuration Register
50h
6
0
6
0
TRPA2
—
5
0
5
0
TRPA1
—
4
0
4
1
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TRPA0
—
3
0
3
0
BPCS1
—
2
0
2
0
BPCS0
TPM
1
0
1
0
BPEN
TPC
0
0
0
0